SUMMARY:

• Program in C, C++, Java, Android, assembly languages, and scripting languages such as TCL/TK, BASH. Debug logic in Verilog. Bring up and test new hardware. Support design, test and manufacturing groups.

PROFESSIONAL EXPERIENCE:

Completed ASIC Test Engineer Contract

Confidential, San Jose, CA

Responsibilities:

• Modify and write TCL/Expect scripts to test ASICs on board running under Linux.
• Use Thermotron and Peltier for thermal testing.
• To test ASICs work with BGA sockets and deal with their and board issues.
• Use IXIA to run traffic. Run manually and modify scripts for various scenarios.

Test Technician

Confidential, Santa Clara, CA

Responsibilities:

• Protocol and Electrical Compliance Testing of SATA, USB, and Thunderbolt devices.
• Setup LeCroy, Keysight/Agilent and other gigahertz scopes for electrical testing.
• Setup SATA protocol tester.Setup LeCroy,
• Tested thunderbolt devices on Apple Macintosh computers spanning range of thunderbolt chip sets.
• me have an AA in Japanese so like to visit Japan to practice Japanese.

Temporary Software Engineer

Confidential, San Jose, CA

Responsibilities:

• Wrote C++ code to process a capture file from a IOTracer Utility.
• Setup Clonezilla on a USB Flash Drive to configure or restore Fedora Linux and hard drive partitions on Dell Servers.
• Setup a variety of VMWare virtual Windows and Linux systems.

Manufacturing Test Engineer

Confidential, San Jose, CA

Responsibilities:

• Created diagnostic functional test scripts for Confidential 's IP Ethernet Broadband line cards using ProComm Aspect.
• Supported SE100 test fixture maintaining TCL test scripts running under Linux.
• Tested on - board data links between PPA2 chips, DIM FPGA, Back plane and front network ports. Ran data with boards in feedback modes and also used external feedback cables and passed data between line cards out front ports and through teh back plane. Continually updated, tested and identified issues with new board FPGA and VxWorks images and brought issues to respective teams.
• Used lab tools to identify problems such as failed DC-DC converter, damaged components, bad memory, BGA connection problems.
• Supported and visited contract manufacturers such as Plexus in Fremont and Jabil Circuits in San Jose and Guadalajara Mexico to train technicians with tests on new line cards and to help with board debug.
• Maintained and updated test fixtures online at remote contract manufacturers.
• Developed technical documents for engineering review meetings.
• Updated agile database with line card test scripts and FPGA and VXWorks images.

ASIC Validation

Confidential, Santa Clara, CA

Responsibilities:

• ASIC Validation. Wrote validation code in C, TCL, and custom microcode for teh fourth-generation of a hardware EDA accelerator.
• Loaded up teh system by setting memories and configuring many muxes. System consisted of one or more boards with each board having 8 copies of our custom ASIC.
• Ran payloads through teh data paths, and checked results. Found and documented numerous errors involving manufacturing flaws, timing problems, reset problems, and Xilinx FPGA rocket me/O link problems.
• Developed many tests for manufacturing and lab use, as well as some diagnostics for running test clusters. Went through teh ASIC's Verilog and talked to teh system architect to see how to test teh system.
• Wrote microcode for teh custom CPU for running many millions of cycles and calculated or wrote C code to calculate expected results. My work contributed to teh eventual successful bring-up of teh system.
• Tharas Systems wasn't getting enough POs so had to merge with Eveteam.com.

C Programmer

Confidential, Mountain View, CA

Responsibilities:

• Brief Engineering task. On Winkler Project - a precision gamma ray detector that was being refurbished at NASA Ames. Read old 8085a firmware with my EETools EEPROM programmer.
• Found an 8085 disassembler written in old style C with original type of function parameter declarations. Modified it to run under Linux and disassembled teh original 8085 image.

Firmware Engineer

Confidential, Sunnyvale, CA

Responsibilities:

• Wrote embedded C code running under VxWorks for a 9 disk fibre channel storage array.
• Performed many embedded software tasks as part of teh development of teh RAID storage array. Wrote firmware for teh cache-board that ran on teh MIPs core of an enclosure management chip (Vitesse VSC120). Configured various ports and pins, including FC-AL, I2C/SMBus, GPIO, interrupt and serial ports,
• Used I2C chips and teh VSC7147 to run hardware fibre channel device bypass tests.
• Upgraded teh I2C driver on teh controller boards when me encountered an infinite retry bug.
• Wrote code to validate teh fibre-channel loop (by issuing LIP's) and communicated teh state from teh cache board to teh controller.
• Programmed teh FPGA. Optimized teh code for speed. Wrote a wrapper to compress teh code so that two FPGA image copies could be stored.
• Found hardware bugs involving teh board configuration and connections.

Firmware Engineer

Confidential, Newark, CA

Responsibilities:

• Software debug for Sun's T3 mid-range storage array which was modified from a similar Maxstrat storage array. Made a version of teh build system which used gcc since it identified many errors which teh PSOS compiler missed.
• Used openboot F-code, a version of Forth, firmware on a low-end storage array being developed. Teh array used a Sun motherboard and a custom board with a PCI bridge and PCI to IDE chips along with IDE drives. Wrote diagnostics to probe teh I2C and PCI buses.
• Discovered existing bugs in Openboot involving teh I2C and PCI Bridge drivers. Used cscope and scripts to trace through teh Openboot source code to find bugs.

Firmware Engineer

Confidential, Fremont, CA

Responsibilities:

• Designed algorithm and wrote all teh Verilog for teh remote control's audio search pattern identification chip and tested it in an Altera FPGA. Used Synopsys dc shell and Galileo to compile teh Verilog.
• Logic-design and debug in verilog and DVD player firmware in C.
• Modified teh player's firmware which was running in an ICE. Changes enabled teh state of teh machine to be monitored by using its remote control and on screen display(OSD).
• Teh MPEG chip had several error counting registers which were important to monitor. found many errors such as problems passing data between two clocks and problems at some DVD format block numbers. When there were problems playing audio CD's studied source verilog and found that head and tail pointers of teh input buffer could pass each other and even flip left and right audio channels.