Senior Design Engineer Resume

SUMMARY

Design and verification engineer position in analog, digital or mix - signal design.
Highly motivated senior design engineer with experiences in chip and board design. Experienced including digital and analog/digital mix-signal ASIC design, firmware design, microprocessor-based design, chip and board layout.
Experienced with digital and analog/digital mix-signal SoC integration, logic synthesis, chip and block level verification, DFT, ATPG, static timing analysis, chip bonding, floorplan, clock tree synthesis, AP&R.
Experienced in microprocessor-based system design. Developed chips and functional blocks including RTL coding, verification, timing closure, firmware generation. Developed FPGA demonstration systems.
Experienced in embedded system programming, firmware design and development.
Experienced design debug system with JTAG technology.

TECHNICAL SKILLS:

Cadence: NCSim, VerilogXL, SOCEncounter, UltraSim, AMS.

Synopsys: DC, PT, VCS, PrimeRail, Fomarity, HSPICE, CustomSim, Discovery AMS, ICCompiler, SiliconSmart.

Others: ModelSim, MATLAB, SPICE, FreePCB, EaglePCB, DipTrace, MathCad, Zeni DM, UVM, Oscilloscopes, signal generators.

Programming Language: PERL, TCL/TK, Verilog, VHDL, C/C++, Assembly, FORTRAN, Pascal, Visual Basic.

Architecture: Z8, 80x86, TMS320 C50, V850E processors system and architecture I/O interfacing, memory accessing and other relevant hardware design ATM, X.25, OSI, TCP/IP, Digital communications theory, Digital signal processing, MIPI, miniLVDS.

PROFESSIONAL EXPERIENCE

Confidential

Senior Design Engineer

Responsibilities:

ASIC-SOC integration and verification of touch panel controller.
Chip level verification with function patterns generation and analog/digital mixed signal co-simulation with UVM environment. Tester vectors generation.
FPGA development to verify display control logic. Design system and logic for miniLVDS interface circuit for display system.
Post silicon verification for touch control chip.
New libraries characterization and verification.
Auto P&R and timing closure on digital section.
Custom IC design flow development and maintenance.
RTL design for digital controller.

Confidential

Consultant

Responsibilities:

Lead technology team for new design memory device design. Work as technical contact window with external co-workers.
Develope new algorithm and circuit for analog-digital conversion (ADC) with new searching methodology. Layout prototype board and IC block. Pattern filed for ADC circuit.
Design memory address circuit by 3-dimension location concept used basic CMOS circuit and demo the circuit on PCB. Map new memory device input/output signals to the ROM addressing format that can be used in current market without major change in application system interface.
Define control interface between memory chip and PC for reading and writing procedure. Define testing system for memory chip. Finalize memory testing system architecture and communication protocol.

Confidential, Irving, TX

Design Engineer

Responsibilities:

Custom IC design. Chip integrate for consumer ASIC including floorplan, Place & Route, back-annotation, physical verification. Verify consumer ASIC design including pre-layout and post-layout netlist. Design flow support.
Integrate consumer ASIC design including synthesis, formation verification, simulation, DFT, and ATPG. Verify the functionality of automobile control chip by assembly. Develop control program for macro operation in block level to verify detail function of existing macro based on verification plan.
Develop macros in automobile design based on system specification including HDL coding, synthesis, simulation, timing-closure, and final verification. Generate verification plan of automobile macro design for both macro and top level verifications. Generate functional verification patterns for new developed macros.

Confidential, Carrollton, TX

ASIC Design Engineer

Responsibilities:

Physical design for consumer ASIC including bonding, floorplan, Plane & Route, back-annotation, and post-layout verification.
Support custom IC design back-end flow and tools. Design and maintain design environment for ASIC design by update flow and tools.
Train new engineer for bonding and back-end design flow.

Confidential . Dallas, TX

Hardware Design Engineer

Responsibilities:

Define guideline for software engineers to develop the translation of displaying web page content on traditional analog TVs. Define IR code for web TV based on universal remote control code.
Search for potential components fabrication based on project needed.

Confidential . Richardson TX

Associate Systems Engineer

Responsibilities:

Develop firmware for real-time embedded system utilizes JTAG/Boundary scan technology.
Generate control program for data passing between different protocol layers by C and assembly language.

We provide IT Staff Augmentation Services!

We'd love your feedback!

Resume Categories

Client Services

Job Seekers

Visa Sponsorship