PROFESSIONAL PROFILE:

• Super - experienced software engineer capable of making contributions to FPGA and schematic design as well.
• Most of work done in embedded systems in all major and many lesser known CPU and OS architectures, but some projects involved desktop and smartphone applications and streamlining of overall development process as well.
• Able to solve ANY software problem and quite a few hardware problems, as well as properly and efficiently organize any development process.
• Focused on solving problems and moving project forward in the most efficient and expeditious way for the long term rather than picking and choosing which specific programming languages and technologies to specialize in - I can do them all if they are needed to solve a problem at hand.
• Able to take fast shortcuts to quickly bring up prototypes as well as cross the t’s and dot the i’s for proper long-term organization.
• Able to follow code design and execution patterns from the highest-level application layers to the lowest levels of interacting with hardware to have complete view of the system, offer optimal solutions which actually solve given problems, offer guidance to more junior engineers as well as expert advice to executives.
• Overall committed to just getting things done in the most technically proper, efficient, and best organized ways, either independently, in small teams, or large organizations. Definitely like to pursue optimal solutions, increased streamlining, and efficiencies over time.
• Learn new technologies on demand as needed, become as expert as I need to be to match needed level of understanding to problems at hand.
• Best matched with friendly and flexible work environments where technical skills and continuous pursuit of improvements are valued.

TECHNICAL SKILLS:

Hardware: PC, Sun, Apple, Android phones, custom-application embedded

Operating Systems: MS-DOS, Windows 3.1/95/98/NT 4.0/XP/Vista/7, SCO and Solaris Unix, VxWorks, pSOS+, OSE, ThreadX, Linux, DSP/BIOS

Languages: Pascal, C, C++, C#, FoxPro, MS Visual Basic, Java/JavaScript/CORBA, VBScript, HTML, ASP, various assembly

Databases: Oracle, MS SQL Server, MS Access

Protocols: Ethernet, VLAN, DHCP, DNS, UDP/IP, TCP/IP, STP, OSI, telnet, FTP, FTAM, LAPD, LAPB, TARP, JDBC

Processors: Motorola PowerPC 850/860/8250/8260/8349 , Motorola HC11, MicroChip PIC, Sharp LH7A400 ARM SoC, TI ARM, MIPS, Intel 80188, Intel 8051, Texas Instruments TMS320F28335, Confidential 8060A, NVIDIA Tegra 3/4

Support software: OrCAD, Omnify, ClearCase, Perforce, CVS, SVN, git, SDS debugger, gdb, DDD, ESP, VxSim, Tornado, various scripting tools, Crystal Reports, Netscape Enterprise Server, Visigenic Visibroker, MS Visual Studio, Diab compiler, gcc compiler, and others

Supporting hardware: HP PPC 860/8260/8349 emulation probes (BDMs), AMC PowerTap, Signum JTAGjet for ARM, TMS320 JTAG debuggers

PROFESSIONAL EXPERIENCE:

Confidential, Union City, CA

Consultant

Responsibilities:

• Investigated various fragmentary software repositories to piece together buildable baseline for software executing on Abaxis/ Confidential VS2 NGA line of hematology analyzers. The task was complicated by almost total lack of coherent and consistent software development process in years prior, as well as retirement of key personnel, lax source control practices, absence of issue tracking database, limited documentation, and general loss of prior knowledge. The need to support existing customers in the field and make ongoing enhancements to analyzer software (due to ongoing significant cash flow from selling analysis cartridges) prompted urgent need to reconstruct analyzer software baseline as soon as possible from whatever fragmentary resources available.
• Achieved 100% executable content binary match of new software baseline with the last previously released software, thus completely eliminating risks of feature regression, introducing issues, and eliciting customer complaints from unexpected breakdowns.
• Performed extremely detailed examination of i386 QNX 6.3.2 application ELF binaries and performed hard disassembly in some cases to achieve 100% new software baseline match. Achieved the same result with QNX core system IFS image.
• Achieved similar source to binary match for VS2 NGA Engine codebase executing in Intel 196 bare metal context (Engine board performs actual hematology analysis vs Console board for QNX-based GUI and external interface).
• Performed examination of system architecture (VS2 NGA based on Intel 486 and VS2 JenII based on Intel Atom N270) and C++ application code to provide guidance on future development paths.
• Provided guidance for bringing up Linux kernel on VS2 JenII analyzer running Windows CE to explore migration to latest OS.
• Set up VM-based build environment and procedures for error-free consistent compiling of QNX core system and application binaries, as well as generating release CD ISO image.
• Provided detailed guidance on proper source control and build & release procedures.
• Added feature to VS2 NGA analyzer requested by Product Management to automatically refresh GUI screen when new analysis request has been sent to the analyzer from a management system. While adding this feature fixed pre-existing C++ application code bugs, streamlined processing efficiency, and through updated more robust design eliminated discrepancies between work orders selected in GUI and the ones actually opened on screen. Work involved tapping previously unused features of QNX Photon library (for GUI).
• Conduct research in the area of artificial intelligence, software development tools, reverse-engineering, intellectual property protection, and web technologies.

Confidential, Los Gatos, CA

Consultant

Responsibilities:

• Was in charge of firmware and software development and debugging for Confidential RT real-time PCR analysis device.
• Firmware written in C++ executed on NXP LPC1768 ARM Cortex-M3 CPU managing fan control, stepper motor and encoder control, PWM LED control, LED light sampling (with photodiodes, analog integrators, and ADCs), PWM thermo-electric cooler (TEC) control, temperature sensors, IR sensors, UART, internal flash, SPI flash, etc. PID control loops were used to maintain temperature and fan speed setpoints. Software application written in C# executed on Windows PC.
• Reverse-engineered proprietary scripting engine with its own proprietary XML-based macro language executing as part of device firmware. The language and features of this macro engine were quite sophisticated (e.g., the engine could handle fork and junction of macro code segments). This engine was responsible for most of device’s high-level behavior yet no documentation was provided by prior contractor and its original developer. This reverse-engineering effort was key to taking effective control over device’s behavior and understanding the interface between the device and the PC application.
• Worked on reverse-engineering and modifying VHDL code for Lattice MachXO2 FPGA/CPLD hybrid controlling synchronized ADC readings of analog-integrated samples.
• Worked with hardware engineers to debug and fix hardware issues.
• Interfaced with PhD-level expert knowledge holders at Streck (customer) and internally. Implemented both firmware and software features per requests.
• Interfaced with third-party validation and verification (V&V) company to review code prior to development completion and application for FDA approval.
• Briefly involved with Two Pore Guys (Ontera)/Monsanto crop testing project.

Confidential, Milpitas, CA

Consultant

Responsibilities:

• Architected, developed, and maintained FreeRTOS-based test board firmware for CFP2-DCO module.
• Test board based on Xilinx Zynq-7030 FPGA with embedded dual ARM Cortex-A9 cores.
• Worked with FPGA designer to define programmable logic interfaces. Defined and developed syntax-consistent UART- and TCP/IP-based command shell interface to control board devices and retrieve device status.
• Fixed bugs in device drivers provided by Xilinx. Optimized LWIP stack for fastest command-response throughput over 1G Ethernet port connection, also taking into account default TCP/IP settings of Windows workstations; achieved round-trip back-to-back command-response execution of 200us (including time taken to process the command). Worked with test engineers on adding new features to streamline scripted testing process. Test board with blazing fast command interface was specifically credited with facilitating and radically speeding up test flow to enable completion of testing in time for customer trials.
• Contributed to FreeRTOS-based firmware development for CFP2-DCO management CPU (NXP Kinetis K22 ARM Cortex-M4) responsible for processing commands from and reporting status to module’s host using MDIO interface. Notable areas of involvement were device drivers, thread locking, and data integrity. Worked with FPGA designer to optimize Kinetis/FPGA interface.
• Architected and developed Kinetis DMA-based scheme for receiving rapid-fire short SPI messages from FPGA every 6us. Standard IRQ-based approach was not feasible due to IRQ service latency of greater than 6us. Implemented scheme with reception of first message triggering IRQ and subsequent messages DMA-queued and de-queued by FreeRTOS thread.
• Architected and developed prototype of MSA-compliant firmware download sequence for CFP2-DCO module. Firmware download is initiated via MDIO interface by module’s host using standard-defined sequence. Implemented RAM-based code to program internal Kinetis flash one block at a time. Reverse-engineered Acacia CRC32 scheme to maintain interface compatibility. This prototype was critical to completing Cisco customer trial.
• Enhanced firmware download prototype to contain firmware images for multiple module sub-devices in ar-based archive file and implemented on-the-fly parsing of this file on embedded Kinetis CPU. Debugged ADuCM320 (Analog Devices ARM CPU) key-based banked image switching.
• Developed Cygwin-based command line tools for MSA-compliant firmware upgrade sequence.
• Implemented JTAG scripting for Kinetis flash programming. Experimented with JLink Open FlashLoader to program SPI flash attached to Kinetis CPU via JTAG interface.
• Provided general advice on firmware development approaches and techniques and assisted other engineers with resolution of critical issues reported by customers and discovered internally.

Confidential, Campbell, CA

Consultant

Responsibilities:

• Architected and developed firmware for iWatt 680 USB charger controller to support Huawei SCP (super charger protocol) along with standard BC1.2 sequence and Confidential ’s QC2 charging protocol.
• Underlying hardware utilized Intel 8051 CPU architecture (with 8052 extensions) with proprietary peripherals to control various internal and external chip interfaces, A/D converters, deglitch cells, voltage and current control, fault detection and protection actions.
• Coding involved the use of sdcc compiler as well as 8051 assembly language.
• Implemented and heavily optimized SHA256 algorithm computation for Huawei 11V3A high-voltage charging protocol. SHA256-based authentication is required prior to enabling high-voltage charging to avoid damage due to improper operation of a counterfeit charger.
• Wrote firmware for SCP test jig (effectively, a simulator to mimic Huawei SCP capable smartphone) utilizing STMicro STM32 ARM-based controller.
• Investigated general issues pertaining to 8051 code density in terms of both C coding techniques and compiler options. Provided guidance to other firmware engineers.
• Provided advice regarding general process for handling customer’s authentication keys internally to avoid these keys being leaked to the world at large.
• Mentored intern and guided him in validating proprietary I2C-based 8051 CPU debugging interface and developing more reliable firmware download and debugging tools. Effort involved writing firmware for STM32F030 microcontroller based board to act as proprietary type of “JTAG” debugger.
• Interviewed candidates for firmware team lead position (effectively, a full time employee to replace me) and created written guidelines for such interviews to be followed by HR and Engineering to speed up the process but also zero in on most qualified candidates.

Confidential, Kent, WA

Consultant

Responsibilities:

• Analyzed existing system of control objects based on Echelon Neuron processor and LonTalk network spanning large aircraft to architect and prototype similar system for Android- and Linux- based devices over Ethernet network aboard aircraft. Idea is to control and query various devices located in different sections of aircraft and integrate them to behave as unified system for audio/video entertainment, flight status, status of various devices, and actuation of various relays.
• Wrote object framework in C language but utilizing object-oriented techniques to execute on real devices as well as Linux desktop for simulation.
• Became expert in Audio/Video Bridging (AVB) and Time Sensitive Networks (TSN) based on IEEE Precision Time Protocol (PTP) and IEEE 802.1AS (gPTP) standards. Architected AVB board designs based on i.MX6 and Snapdragon processors. Reverse-engineered and analyzed AVB reference designs from major vendors in the field, including XMOS, NXP, and Atmel. Became so familiar with Cirrus Logic CS2000 family of audio PLL chips (CS2000, CS2100, CS2300) that even Cirrus Logic tech reps could not match it.
• Became expert in audio clock synthesis and recovery.
• Became expert in AVB design using Intel i210 Ethernet controller (also targeted by OpenAvnu reference stack) connected to the processor over PCIe bus.
• Prototyped AVB for i.MX6 and Snapdragon processor boards for actual audio/video entertainment systems aboard luxury VIP aircraft. As many as 60 talker sources and at least just as many listener consumers. Synchronization of multiple speakers for 7.1 8-channel audio to within 1 microsecond for ideal surround audio playback over AVB Ethernet network.
• Became expert in i.MX6 processor SDMA block, which is old proprietary Motorola RISC processor with its own instruction set and assembly language. Read out and reverse-engineered SDMA ROM to be able to write custom DMA scripts for custom applications. Typically this expertise is only available from NXP Professional Services at significant cost.
• Ported Android system from legacy i.MX6 design onto i.MX6 QWKS-SCM evaluation board which utilizes i.MX6 processor with Package on Package (PoP) RAM chips configuration and integrated PMIC.
• Advised team members generally on design and debugging techniques related to Android- and Linux-based systems with NXP i.MX6 and Confidential Snapdragon (both 32- and 64-bit) processors.

Confidential, Redmond, WA

Consultant

Responsibilities:

• Implemented from scratch Linux-based simulation prototype of MAC control plane for satellite-gateway attach and detach, intended as an element in overall SpaceX scheme to provide satellite-based Internet service worldwide.
• The elements of the implementation included protocol state machines of multiple entities, IPC, multiple contexts and threads to handle multiple MAC instances, and usage of kernel facilities. Simulation prototype is fully portable to Linux- and ARM A53-based quad-core flight and networking computer in satellite and ground gateway terminal.
• Participated in high-level design reviews and discussions.
• Provided implementation/prototype-driven feedback for high-level design documentation.
• Worked with FPGA engineers to define interfaces between software and hardware.
• Worked with software platform team to define platform abstractions.
• Worked with peer software team to define IPC interfaces.
• Exposed to MISRA C coding standards.
• Conduct research in the area of artificial intelligence, software development tools, reverse-engineering, and intellectual property protection.

Confidential, Sunnyvale, CA

Consultant

Responsibilities:

• Lead role in adding features to and debugging issues with FreeBSD PCIe network interface card drivers for Intel 10/100/1G/10G/40G and Qlogic 1G/10G devices.
• On the front lines of interacting with QA team and triaging problem reports as well as managing/negotiating driver interfaces with teams developing components that interact with the drivers.
• Discovered and fixed serious bugs in stock FreeBSD drivers e1000 (Intel 10/100/1G), ixgbe (Intel 1G/10G), ixl (Intel 40G), and qlxgbe (Qlogic 1G/10G).

Confidential, San Mateo, CA

Consultant

Responsibilities:

• Stabilized smart camera product for Beta shipment.
• The product is composed of two boards: one with TI CC3200 combined network processor and ARM Cortex-M4 MCU with TI RTOS responsible for wi-fi connectivity and sensor-based activity detection, and one with TI Davinci DMVA2 processor with embedded Linux responsible for video capture, recording, upload, and streaming.
• Resolved complex EDMA request overloading and prioritization issue on TI DMVA2 affecting everything from SPI link communication to audio capture.
• Entirely rewrote and super-optimized SPI drivers on TI DMVA2 and TI CC3200 to streamline and remove errors from inter-processor SPI link communications used for internal messaging and external wi-fi traffic. The link is now capable of bidirectional traffic with less than 90us flow control inter-packet gap and only 1-2% CPU use.
• Resolved complex Audio/Video Server crash issue on TI DMVA2 affecting ability to initiate live stream.
• Fixed bugs in the original TI DMVA2 SPI driver related to improper DMA buffer mapping.
• Fixed bugs in the original TI CC3200 GPIO library related to improper interrupt event clearing and missed rising/falling edge events.
• Resolved issues with process priorities and reaping of zombie processes on TI DMVA2.
• Provided recommendations for general direction of further firmware improvements.
• Conduct research in the area of artificial intelligence, software development tools, reverse-engineering, and intellectual property protection.

Confidential, San Jose, CA

Consultant

Responsibilities:

• Brought up latest generation sensor hub and gyroscope + accelerometer MEMS sensor chips: ARM Cortex M0, proprietary Digital Motion Processor (DMP) v3 and v4, ZSP400 DSP, digital logic (SPI, I2C, FIFOs, DMA, timers, etc.).
• Prototyped extraction and playback of PCM audio samples from PDM digital microphone via ZSP to SPI master.
• Worked with IC designers and software engineers to resolve chip issues and bridge understanding gaps.
• Educated members of systems and validation group about the sensor hub chip.
• Architected C# interfaces to various test platforms to enable seamless test case execution on multiple types of platforms.
• Recommended and provided feature specification for the next generation test platform and chip validation test farm.
• Analyzed customer application use cases and software implementations to guide validation group in test case selection.
• Guided porting of Nexus 5 code to industry-standard Intrinsyc DragonBoard with latest 64-bit Confidential CPU APQ8094.

Confidential, San Jose, CA

Consultant

Responsibilities:

• Contributed to the development of network packet acceleration NSS engine based on proprietary Confidential network processor on a single IPQ8066 silicon die with dual-Krait ARM processor. NSS firmware is responsible for IPv4/IPv6 data plane packet acceleration, including bridging, routing, tunneling, and shaping.
• The Krait-side components include Linux kernel networking driver for the NSS, enhanced connection manager responsible for offloading decisions, and interfaces to StreamBoost technology.
• Designed and Implemented NSS firmware scatter/gather support to enable transmission and reception of multi-buffer jumbo frames, zero-copy IP and GRE fragment frames, zero-copy IP multicast frames, and zero-copy IP and GRE packet reassembly, as well as exchange of chained (frag list) and segmented (nr frags/frags) skb’s with Krait CPU.
• Contributed to the design of secure GTP-U offloading component for Remora silicon die targeting LTE femto cell applications and integration with other LTE components such as S1AP, X2AP, OAM, and IPSec tunneling.
• Fixed critical bugs for upcoming software releases.
• Conduct research in the area of artificial intelligence, software development tools, reverse-engineering, and intellectual property protection.

Confidential, San Jose, CA

Principal Member of Technical Staff

Responsibilities:

• Defined, implemented, and guided implementation by others of Linux kernel driver and proprietary algorithm-processing userspace daemon to support MAX11925 Smart Touch Imager first-in-class capacitive touchscreen controller with only analog front end and all algorithmic processing done on Android phone/tablet vs. small MCU inside TSC itself.
• Brought up touch panels for LG Gpro phone and LG B1 phone.
• Optimized %CPU usage and power consumption due to algorithmic processing on applications processor. This work has convinced LG that doing algorithmic processing on the applications processor is viable. At 560 touch events per second MAX11925 + AP would consume only 47mA more overall system current than classical competition TSC at 120 events per second, most of 47mA consumed by analog circuitry active most of the time to yield record-high 560 touch frames per second.
• Rewrote extremely inefficient Confidential Linux SPI driver to significantly reduce %CPU usage and system power consumption.
• Optimized touch algorithms processing to reduce %CPU usage and power consumption.
• Delved in all aspects of touch algorithms processing: touch detection, finger and passive stylus feature extraction, finger/stylus tracking, smoothing filter, palm rejection, noise immunity, and coordinate reporting.
• Traveled to Korea to work with LG engineers in Seoul to bring up Gpro and B1 phones and resolve issues.
• Coordinated software architecture and project deliverable items with LG and NVidia teams.
• Rewrote TacTouch Studio C# Windows GUI application to support MAX11925 in Direct Touch mode.
• Implemented double-tap and character recognition library for Confidential 8074 ADSP to wake up LG B1 phone from suspend mode with touchscreen gesture instead of power button.
• Coordinated software architecture and project work items with Confidential team to implement touch function on MSM8074 ADSP: integration on the AP side, IPC between AP and ADSP, and ADSP driver and wakeup processing library.
• Interviewed technical candidates and provided hire/no hire recommendations.

Confidential, San Jose, CA

Consultant

Responsibilities:

• Architected and implemented wi-fi over adb connectivity feature to stream capacitive touch raw data from Android phone in floating condition (absence of ground and wired connectivity) to Windows GUI application and to control touch controller chip from the GUI application. Implemented components of both Linux kernel driver on the phone and Windows GUI on PC to make the feature work.
• Architected, implemented, supported, and maintained Linux kernel driver to perform firmware download to the touch controller (during any startup, including over-the-air update), initialize the chip, and collect touch events over I2C and announce them to Android via input subsystem and Input Reader. The driver was developed with full debugging support, including fast printk (on the order of 10 microseconds) and sysfs attributes for easy command-line live debugging.
• Prepared documentation for MAX11871 capacitive touch controller Linux driver and consulted FAEs on the topic of integration into customers’ systems.
• Traveled to Taiwan and Korea to integrate MAX11871 into HTC’s, Pantech’s, and LG’s phones and educate local FAEs.
• Provided support to Intel and served as key point of contact for touch controller software integration in their Medfield 2 phone and reference platform.
• Worked with NVIDIA to integrate MAX11871 into their Enterprise platform.
• Worked with Linux kernels 2.6.28 through 3.4 and Android Gingerbread through Jelly Bean.
• Wrote Confidential DSPS driver for MAX88260 IR gesture sensor and provided onsite integration support at Pantech/Korea involving the DSPS driver and proprietary gesture recognition algorithms library. Coordinated with Confidential to iron out interfaces. Same gesture sensor was used in Samsung’s Galaxy S IV and became known as Air Gesture.
• Became expert at integrating Linux kernel driver into Linux kernels of Asian customers who do NOT provide kernel source code to their supplier/development partners. Stock kernels were used to compile driver loadable modules and disassembly as well as modversions patching techniques were used to make the modules link and execute reliably.
• Supported touch controller firmware development and gesture sensor hardware and software teams with respect to integration into actual Android phones and Linux kernel interactions.
• Ported MAX11871 MAXQ-based touch controller firmware to execute on NVIDIA Tegra application processor as part of NVIDIA’s Direct Touch initiative (Tegra 3 Kai platform and Tegra 4 Pluto platform). Analog circuitry in the chip would sample capacitive touch raw data and algorithms executing on the application processor would perform feature extraction and report X/Y/Z coordinates for finger and passive stylus.
• Implemented Direct Touch equivalent on Confidential ’s 8060A-based DragonBoard.
• Streamlined capacitive touch raw data acquisition over SPI on both NVIDIA and Confidential platforms taking into account specificities of each platform, including SPI master driver structure and use of DMA and hardware-based chip selects.
• Wrote Android Java app to graphically select between finger and stylus touch mode.
• Brought up Sharp MIPI DSI 5” 1080p display with Renesas LCD drive IC on Confidential DragonBoard platform.
• Architected and implemented framework for proprietary user-space processing of raw data in Maxim’s touch, IR gesture, and audio applications. The framework consists of generic Linux kernel driver which is GPL-licensed and contains nothing more than generic interrupt processing and APIs for accessing the hardware (read, write, reset, etc.), and proprietary binary-only user space executables that perform all real processing. Netlink sockets are used to communicate between user space and kernel space. Legacy firmware code was converted into full-fledged state machine design. Set up Linux- and Windows- based development environment for this framework.
• Participated in architectural definition and later brought up brand-new MAX11925 SmartTouch Imager chip containing nothing but analog capacitive scanning circuitry and logic. All complex feature extraction is done on application processor.
• Provided guidance on using touch/input Linux APIs to announce gestures to Anroid.
• Conducted technical interviews of candidates for software development positions.

Confidential, San Jose, CA

Consultant

Responsibilities:

• Maintained Wind River Linux toolchain based on Linux kernels 2.6.27 and 2.6.32 for the 100+ developers of the Voice over IP phone group and provided recommendations about further toolchain and tool upgrades.
• Accelerated Linux-based phone builds through build sequence optimization and parallel compilation from 3 hours down to 40-50 minutes and then reduced it further down to 10 minutes.
• Facilitated transition from development environment based on Fedora Core 10 32-bit to Cent OS 5.7 64-bit to take advantage of latest multi-core Intel processors. The build, the toolchain, and other associated tools were made to work on the new OS. Provided recommendations for further upgrades to CentOS 6.2 64-bit.
• Fixed difficult to reproduce and debug file I/O issue on the build host related to Wind River’s pseudo-root environment. The investigation has received significant attention from Wind River.
• Implemented functionality to embed initramfs image into kernel without fully recompiling the kernel.
• Enabled debugging of running processes through “gdb --attach” which was not working previously.
• Prototyped parallel source control checkout feature which with proper source control server tuning can cut down checkout time in half.
• Provided blueprint for intelligent source control implementation to eliminate unnecessary checkouts to reduce checkout time.
• Provided blueprint for regression cluster to rapidly (on the order of 5 minutes) test all code checkins against all phone codebases simultaneously to effect codebase stability and overall development team productivity through prevention of checkins of non-compileable code.
• Served as primary contact for all build-related issues worldwide: Vancouver Canada, North America, India, and Thailand.
• Debugged and assisted in debugging Linux platform issues.
• Provided recommendations to run Linux executables in QEMU host-based simulator and integrate Linux and VxWorks development under a single Linux host platform and toolchain.
• Offered general process improvement recommendations.
• Conduct research in the area of artificial intelligence, software development tools, reverse-engineering, and intellectual property protection.

Confidential, San Jose, CA

Consultant

Responsibilities:

• Defined hardware and software architecture of the company’s 300-pin MSA 40G transceiver.
• Selected processor-side components, provided feedback to the hardware design team, and reviewed schematics for the first revision board.
• Prototyped experimental aspects of software design.
• Technologies involved: Luminary/TI ARM Cortex M3 processor, SPI, I2C, UART, FRAM, serial flash, ITLA, SerDes, various optical devices.

Confidential, Sunnyvale, CA

Senior Software Engineer

Responsibilities:

• Originally hired to do Data Services software development for FW9500 product line: 802.1ad/802.1ah Ethernet bridging, MPLS, COE, etc. Have taken up development environment overhaul as a dire necessity.
• Responsible for overhauling company’s entire development environment. Entire development organization will transition away from Solaris/SPARC development platform to Linux PC development platform: 150 developers at 4 worldwide locations: Richardson, TX, Pearl River, NY, Sunnyvale, CA, and Chennai, India (Wipro). At the cost of $350K the company will avoid spending $2M, thus saving $1.65M and boosting productivity across the board at the same time.
• Have made the proposal for the above overhaul and resolved all critical and major technical issues pertaining to it: PC component selection, OS selection (CentOS), coordination with IT department, tools migration, compilation/build migration, debugger and testing framework migration, source control methodology adjustment, etc.
• Outlined company’s strategy for evolving its software development in the direction of (a) componentizing source tree (12 million lines of code) to cut down on compile times, re-use components between products, and promote outsourcing, (b) executing embedded software on Linux host PC to minimize dependence on embedded hardware and to do better unit testing.
• Evaluated cheaper alternatives to expensive cluster build technologies such as Electric Cloud.
• Served as point of contact with Coverity regarding evaluation of Coverity’s code analysis tools.
• Have assumed the lead in resolving issues with Green Hills compiler: license usage, compilation speed/throughput, etc. Outlined strategy for migration to gcc in the near term.
• Developed core dump feature for OSE real-time OS to enable offline investigation of system crashes.
• Continued to work on research project started previously.

Confidential, Milpitas, CA

Consultant

Responsibilities:

• Provided software and hardware development consulting services to the Advanced Technology Group responsible for prototyping cutting edge technology next generation products.
• Contributed to the hardware schematics of the 100G (5x20G) DQPSK chassis optical board.
• Contributed to the hardware schematics of the 100G (5x20G) DQPSK chassis digital board.
• Selected hardware components based on product requirements, submitted components into Omnify tracking suite, created OrCAD symbols, integrated components into the system design, generated net list and BOM, and interacted with the contract layout house regarding component placement and trace routing for both of the above boards.
• Developed optical board software platform based on TI TMS320F28335 DSP processor to support hard real-time 8kHz ADC sample collection, DSP algorithm execution, and DAC updates. ADC samples were collected and DACs were updated via McBSP DMA to offload processor core. External SRAM chips were configured in 32-bit access mode for improved efficiency. FRAM for parameter storage, GPIO extender, and temperature sensors accessed through second McBSP. Communication with digital board performed via SPI in slave mode. I2C used in master mode for backplane power sequencing and monitoring. ITLA (laser) controlled via RS232. Debug shell and binary communications protocol for debugging and DSP algorithm tuning.
• Contributed SPI driver and API to communicate from MPC860/VxWorks-based digital board to the optical board. Contributed interface to the MPC8260/VxWorks-based management card.
• Participated in project status review meetings and offered feedback.

Confidential, Milpitas, CA

Member of Technical Staff, Software

Responsibilities:

• Worked as lead and sole software developer of the next-generation 4x10G DWDM duo-binary optical transmit/receive board. Joined the project at the moment hardware schematics were being finalized and contributed from that point onward with schematic reviews, firmware requirements specification, DSP processor and FPGA integration (including FPGA requirements specification complete with input/output signal definitions and register map), firmware development, board bring-up, and successful customer demo.
• Implemented complete platform support for Texas Instruments TMS320F28335 DSP processor and DSP/BIOS real-time micro-kernel, including multiple serial ports, SPI, McBSP, and other onboard resources. Implemented drivers for various external SPI components: ADCs, DACs, FRAM, temperature sensors. Implemented driver for 8-port EXAR UART.
• Implemented APIs to control external EDFA (input amplifier) and ITLA (laser) components.
• Provided consultations to 100G team regarding F28335 processor, hitless resets, and SWDL schemes. Developed specifications for DMA scheme to rapidly poll external ADCs and rapidly update external DACs via McBSP with minimal software involvement.
• Provided feedback to the hardware design team regarding digital control section of the board: processor, FPGA, control lines, external SPI devices.
• Provided consultations to system test and operations groups regarding board functionality.
• Developed variety of debug shell and VT100 ASCII GUIs to support hardware bring-up and testing efforts. The debug shell and GUIs were of high quality, saving vast amounts of time during debugging.
• Developed specifications for SWDL and host control of the optical board over serial channel based on XMODEM protocol.
• Implemented control loops for optical components: Mach-Zehnder modulator, OKI RF driver, AWG 4-way WDM demultiplexer, and VOA.
• Implemented minimum bias point search algorithm for Mach-Zehnder modulator; same algorithm can search for maximum power bias point as well.
• Implemented PID control algorithms to maintain Mach-Zehnder, AWG, and RF driver setpoints.
• Developed specifications for and supported unified code base for third-party MSA module products based on the initially proprietary 40G optical board design.
• Assisted in problem-solving for other 40G project issues, including support for VxWorks 6.6 code on chassis line cards.
• Conducted independent research in the area of improving software development tools to find ways to develop software faster, cheaper, with fewer bugs, and make the process more interesting for engineers by automating non-creative elements of the process. Continue to conduct aforementioned research at present and am also conducting research in the areas of philosophy, psychology, (physics and mathematics to be added in the near future), and artificial intelligence.

Confidential, Livermore, CA

Senior Software Engineer

Responsibilities:

• Responsible for resolving issues and implementing features in the company’s entire line of Ethernet Passive Optical Network (EPON) products made up of Edge 2000 and Edge 200 chassis and multiple types of Optical Networking Units (ONUs) serving fiber-to-the-business, fiber-to-the-home, and multiple dwelling unit applications involving VLAN data service, IP Video/IPTV, RF Video, Voice (VOIP and TDM), and Designated Services.
• Worked in conjunction with System Test group to resolve issues in products. Worked in conjunction with hardware group to coordinate board-level changes and bring up new boards.
• Developed switch abstraction layer to enable the company to utilize common code base across products based on different switching devices to provide common interface to the service management layer so that it is able to transparently configure underlying switching device. Contribute to all stages of the design process of new chassis product, Edge 10, intended to deliver EPON service based on the IEEE EFM (Ethernet in the First Mile) standard.
• Contributed to board bring up of new Edge 10 cards and new PowerPC-based ONUs, as well as contributed to resolution of various board-level issues across entire line of products based on PowerPC and TI ARM processors.
• Interviewed candidates for software engineering positions.
• Technologies utilized: PowerPC 8xx/82xx/83xx processor, ARM processor, Switchcore CXE-16 and CXE-1000 Gigabit Ethernet switch devices, Broadcom switch devices, Xelerated X11 network processor, Dune FAP20 traffic manager, Dune FE200 switch fabric, VxWorks RTOS, ThreadX RTOS, Green Hills C/C++ compiler, GNU C/C++ compiler, GNU development and debugging (gdb) tools on Windows platform.
• Implemented hybrid port feature for Switchcore-based ONUs to allow VLAN tagged and untagged Ethernet traffic to traverse same port.
• Implemented CAM flushing feature to remove learned MAC addresses from switch CAM when VLAN port membership changes or port is link down/disabled; the challenge was to do so efficiently.
• Implemented Ethernet Subscriber Access Facility sub-feature to insert/extract Option 82 Circuit ID/MAC address data into/from DHCP packets routed by the chassis.