SUMMARY:

• Information Technology (IT) professional with 15+ years of experience as a Verification Lead / Design Verification Engineer / System Analyst / Software Engineer / Applications Engineer in the Healthcare IT, Semiconductor, and Technology sectors with a reputation for professionalism, thoroughness and commitment to quality and teamwork.
• Extensive knowledge and experience in every phase of Software Development Life Cycle (SDLC) and Quality Assurance Life cycle (QALC) preparing various deliverables for the global cardiovascular applications based on FDA regulations, policies, guidelines and compliance
• Hands on experience in all kinds of testing activities using both manual (black box / white box) and automated testing tools in client server, web based and cloud applications on Windows and UNIX
• Proficiency and extensive hands on experience with developing and executing end - to-end system testing including unit testing, smoke testing, functional testing, regression testing, integration testing, database testing, performance/load testing and user acceptance testing
• 10+ years of programming experience in the C / C++ and Java language
• 8 years experience working with various Oracle databases, MySQL, DB2, Access and MS SQL servers
• Experience working in both Waterfall and Agile development environments
• Excellent troubleshooting and analytical skills coupled with outstanding communication, interpersonal, presentation and self-organizing skills
• Eager to assume new challenges to meet and exceed employer objectives

TECHNOLOGIES:

Operating Systems: MS DOS; Windows; UNIX; Red Hat Linux; Apple Mac OSX

Languages: C; C++; Visual Basic; C#; Java; Javascript; Python; Shell Scripting; HTML5; ASP; XML; PERL; PL/SQL; HL7; Verilog; VHDL; Assembly languages of Intel 8085, Confidential 68000 and PowerPC Processors; and Confidential TMS 320 C30 / C54x / C55x DSP Processors

Databases: Oracle 9i / 10g / 11g; MS SQL Server; MySQL MS Access; DB2; ADO.NET

Server: MS Windows Server; Exchange Server 2000; Citrix

Web Technologies: ASP; ASPX; HTML; HTML5; CSS; Java; Javascript; AJAX

Testing / Automation Tools: HP Quality Center; TeamForge; Rational ClearQuest; JIRA; Test Complete; QTP; SilkTest; Selenium; Sikuli; Load Runner; WinRunner

Software: Verilog-XL; VCS; Synopsys Design Compiler; SPICE; MATLAB; LiveLink; CRM Tools; VMware vCloud Suite / vSphere / ESXi / vCenter / vCloud Director; TOAD; MS Office; MS Project

PROFESSIONAL EXPERIENCE:

Senior Verification & Validation Engineer

Confidential

Responsibilities:

• Reviewed and Analyzed business and system requirements and translated them into testing requirements
• Developed detailed system test plan, overall testing strategy and detailed test cases / test scripts for the applications based on the test requirements and User Interface specification documents
• Extensively used Quality Center for test planning, test case development, test case execution, test log creation and performing test results analysis
• Performed functional, system, regression, integration, performance and user acceptance testing of client server, web based and cloud based applications using both manual and automated testing.
• Developed test automation scripts in Python, VBscript, Javascript, C# for various IMPAX CV applications
• Coordinated backend testing using SQL queries and performed manual testing on PL/SQL scripts using TOAD
• Tracked and entered application defects using Team Forge and verified that all defects fixed by development were tested against the requirements by retesting the affected software and/or component of the system
• Conducted daily scrum meetings to discuss testing issues, activities, time lines and defects triage
• Participated in weekly Project Core Team (PCT) meetings with development and other Project team members and stakeholders to discuss project status and issues and to better understand system functionality in order to improve test coverage and quality
• Acted as verification lead in several projects including Impax Heartstation, Impax CV Reporting, RMAT, Outbound Report Administration, Demographics Manager, Hemodynamics Mapper, DICOM Archive, and Cardiovascular Web Review station
• Represented the verification and validation group in several internal/external audits as well as FDA audit to ensure product compliance with the specific quality standards and requirements including: ISO 13485, ISO 9001, and FDA regulations including 21 CFR 820 Quality System Regulations
• Worked in conjunction with all cross-functional teams to review and analyze current processes and help in identifying potential process improvements

Research Assistant

Confidential, Huntsville, AL

Responsibilities:

• Built and maintained Linux Beowulf Clusters for the research group
• Performed system installation / setup, upgrades, configuration changes for various research applications and data on the cluster servers and set up nightly system backups
• Maintained and developed bash shell and python scripts for users and 3rd party software applications

Senior Design and Verification Engineer

Confidential, Dallas, TX

Responsibilities:

• Worked on the design and validation of next generation DSP CPU for 3G wireless communications
• Lead the interrupt validation effort which involved creating a validation plan, writing validation specifications, and implementation of the periodic and DPC-based interrupt validation methodologies
• Defined and created validation and regression flows using Perl for interrupt validation in TDM
• Generated handcrafted and RAVEN based test cases and wrote coverage monitors
• Performed design simulations in VHDL and C, and debug as necessary
• Worked on GSM FR and AMR codec applications validation

System Design/Applications Specialist

Confidential, Austin, TX

Responsibilities:

• Designed, developed and trouble-shot PowerPC microprocessor based embedded systems and SOC designs
• Provided support in the definition and development of various C / C++ software models for PowerPC, including instruction set simulator models, timing models, cycle-accurate behavioral models and bus-functional and full-functional Verilog models
• Performed system level simulations involving PowerPC microprocessors, memory controller and PCI bridge chips, memory models and other PCI peripherals
• Performed testing and analysis of PowerPC evaluation boards and reference designs
• Assisted customers with successful design-in, layout, debug and verification of their products
• Worked on Nortel TM Codec system-on-chip ASIC design project doing block-level RTL generation and synthesis, FPGA prototype design, DSP firmware design, signal processing and integration
• Developed Verilog RTL code for the L-bus digital serial bus interface on the back plane of the chip
• Worked on other digital interfaces provided on the chip: GCI, IDL, long frame & short frame
• Worked on the ADSL Glite analog front end ASIC design integrating the Verilog RTL blocks for CIC Interpolator / Decimator & Sigma Delta with A/D & D/A routines written in C using Verilog PLI

Network Engineer

Confidential

Responsibilities:

• Worked on frequency allocation to different cells in the network
• Performed radio and microwave surveys for planning GSM cellular network
• Installed new set-up for the production of GDTs used in digital automatic telephone exchange
• Performed assembly and on-floor testing of Gas Discharge Tubes
• Participated in GSM 900 system training for Network Switching Subsystem and Base Station Subsystem