OBJECTIVE:

• A senior technical position in digital communications, signal processing algorithm design, and hardware chip design areas.

PROFESSIONAL EXPERIENCE:

Confidential, Austin, TX

Final System Verification Test Engineer

Responsibilities:

• Verify Linux operating system wifi performance at 5 GHz and 2.4 GHz band for different system platforms such as QorIQ multiprocessors core.
• Build networking router/brdige Linux Images For QorIQ Platform from public ISO and run quality tests of OorIQ systems.
• Check multicore OorIQ porcessors (T4240, P5080) design by testing the Ethernet interface throughput (10Gb) and cryptography functions for HTTPS server.
• Debug hardware interfaces performance such as SGMII, RGMII, SerDes, PCIe to ensure the networking throughput performance.

Confidential, Germantown, MD

FPGA - DSP Engineer

Responsibilities:

• Wrote MatLab simulation and VHDL for Xilinx Virtex-4 FPGA for 3G cellular phone systems.
• Generated Matlab testbench data for FPGA development.
• Evaluated FPGA resource requirement for target algorithm.
• Developed large matrix inversion algorithm with Xilinx FPGA.
• Developed new messages for embedded software executed in TI DSP.
• Modified the digital IF front-end design to capture channel impairment information at baseband.

Confidential, Austin, TX

DSP Engineer

Responsibilities:

• Developed MatLab receiver software for satellite communication.
• Developed TI OMAP5912 firmware for satellite basebanddemodulation showing good constellation in Code Composer.
• Developed and debugged HDLC protocol with VHDL in Xilinx FPGA.
• Ran Modelism simulation to prove that the HDLC protocol worked.

Confidential, Austin, TX

IT Administrator (Contract)

Responsibilities:

• Maintained SQL server operations for Dynamics, Millenium, Crystal Report and FRx accounting software and Kronos Time Keeper.
• Debugged and solved server lockup situations.
• Maintained performance of PC workstations.
• Developed and maintained web page with Visual Studio.net using either C++ or Visual Basic.
• Maintained Exchange Email Server and its email boxes.
• Maintained PBX telephone system for adding or deleting private lines and voice mail boxes.

Confidential, Austin, TX

Senior Applications Engineer

Responsibilities:

• Worked on the firmware design of telephone modem’s signal processing algorithms as well as the embedded real time operating systems (ROTC).
• Debugged modem serial interface hardware timing with Verilog/VHDL using Xilinx Virtex-II FPGA as the emulation platform. ModelSim was used as the high level simulation for design comparison.
• Solved customer’s DAA telephone modem problems with MathLab simulink simulations and C/C++ high level simulations.

Confidential, Austin, TX

Member of Technical Staff

Responsibilities:

• Based on the current SLAC chip hardware Verilog Design, an emulator was built with Xilinx Virtex-E FPGA for developing next generation of ADI software to run signal processing functions for the new chip ( ).
• Involved in ISS-16 Data Over Voice Chipset Design. Responsible for the software calibration algorithm on voice codec component based on the Verilog Design of A/D and D/A components ( ).

Confidential, Austin, TX

Member of Technical Staff

Responsibilities:

• Responsible for V.34 Modem Development. Managed and guided a five-member team to work on the multimedia chipset project ( ).
• Worked on cellular GSM chipset development. Led a four-member team to develop the GSM receiver design as well as transmitter design ( ).
• Developed a chipset solution for wireless phone. Led a team on the software algorithms development. The chipset included voice compression and decompression algorithms, baseband protocol, and other control feature for the 900MHz phone ( ).
• Worked on the High Speed Data Over Voice Network Chipset solution. Responsible for low bandwidth voice A/D calibration problem. The chipset is for public telephone switching office’s ADSL full/lite speed system ( ).

Confidential, Austin, TX

Staff Engineer

Responsibilities:

• Built a G.728 Low Delay Code Exited Linear Prediction (LDCELP) Vocoder with TMS320c31 floating point DSP for Video Conferencing System. Technically solved the complexity problem to fit into the system board design.
• Researched on dereverberation technique (cepstrum, multiple microphone beam forming) for enhancing speech quality in a teleconferencing environment.

Confidential, Forth Worth, TX

Senior Engineer

Responsibilities:

• Responsible for development of equalization techniques for digital cellular communications systems such as USDC, GSM, and PCS. Nonlinear equalizers such as maximum likelihood sequence estimator (MLSE) and decision feedback equalizer (DFE) were used for combating the ISI problem for multipath communication channels in all C++ simulations. Equalization algorithms were implemented with DSP5600 assembly language for real time applications.
• Researched on solving noise problems (e.g. in a noisy car) as seen by a hands-free, isolated word HMM model speech recognizer.

Confidential, Austin, TX

Senior Engineer

Responsibilities:

• Involved in the development of V22bis 2400 baud modem chipset. Responsible for the call progress and the 16-QAM signal generation parts.
• Involved in the development of the Dual Channel Subscriber Line Adaptation Circuits (DSLAC), a device used by telephone switching office that convert the telephone analog speech waveform to PCM format and then execute the TMD switching function. Responsible for the eight taps adaptive echo canceler performance, e.g. ERLE > 30dB at 1KHz.

Confidential, NM Austin, TX

Teaching Assistant

Responsibilities:

• Lectured the senior microprocessor lab class. The class provided the hardware design concepts of Intel 8088/86 based system. It emphasized the use of HP64000 development system to learn the 8088/86 assembly language and its peripherals such as 8255 PIO, 8251A USART (RS232-C Interface), 8253 PIT, 8237 DMA, and 8272 FDC.

Confidential, Albuquerque, NM

Research Assistant

Responsibilities:

• Researched on Adaptive Delay Estimation Algorithm, sponsored by IBM.

Confidential, Albuquerque, NM

Teaching Assistant

Responsibilities:

• Taught the senior microprocessor lab.

Confidential, Albuquerque, NM

Research Assistant

Responsibilities:

• Researched on Echo Cancellation in Telephone Networks, sponsored by IBM. The TMS32020 DSP was deeply used in implementing signal processing algorithms for real time applications.

Confidential, Albuquerque, NM

Teaching Assistant

Responsibilities:

• Taught the senior microprocessor lab.

Confidential, Albuquerque, NM

Lecturer

Responsibilities:

• Lectured a sophomore Circuit Analysis course. Taught the Kirchoff current and voltage laws, Laplace and Fourier transforms, Phasor and the analysis method for circuit with transformer and operational amplifier.

Confidential, San Jose, CA

Design Engineer

Responsibilities:

• Redesigned the transmitter of a telephone line quality test equipment.

Confidential, Albuquerque, NM

Teaching Assistant

Responsibilities:

• Taught a senior electronic course.