SUMMARY:

Leading edge implementation and development ~ Technological Advancements ~ Team Leadership ~ Root cause isolationExtensive background as technical lead or key contributor in product design and development; Specializing in enhancing reliability and speed in delivered product - with experience in real time, Linux, Windows, drivers, firmware, crypto, analytical, core OS components, testability, hardware verification and design. I have a strong background in C, C++, assembly, UNIX, RTOS and have developed on a variety of both platforms and targets.

SKILL SUMMARY:

Operating Systems: DOS, WIN 95/98/ME, NT 4.0, WIN 2K, WIN XP, Win Server 2003,BSD, Solaris, SunOS, IRiX, MacOS, OS - X, Linux, Novell, DEC OS/F

RTOS/Embedded OS: USX, VxWorks/Tornado, ThreadX, Linux, pSOS, SMX, Nucleus, QNIX, AMX, P9, UNIX/RT, + custom

Embedded Application Targets: IA32, HC11, HC05, 8051, 8085, Z80, 56K, 29K, i860, ARM6/8/9, H8, PPC (601,603,603,850,520), 68K, MITS 52530, 6502/65816, SPC800, PIC, TI320, TI240x, TI24x

Desktop Targets: IA32 (WINDOWS), IA64 (NUMA), 68K, PPC (MAC), SPARC (Sun), ALPHA (Dec/Compaq)

Development Environments: Visual Studio 5/6/.NET, CodeWarrior 5/6/7/8/9, Code Composer Studio, MPW, Green Hills, Project Builder, PowerBuilder, MacsBug, WinDBG, BootBug, SoftICE, Rational ClearCase, Rational ROSE, SunWorks, Object Geode, gcc, dbx, gdb, LabView, CVS, Razor, SourceSafe, SCCS, MKS, Oracle, MS SQL, Apache

Network/Protocol: TCP/IP, SNMP, FTP, RTP, DNS, DDNS, sendmail, ASN.1, HTTP, TELNET, ARP, SSL, SCSI, USB, ATA, FIREWIRE, I2C, SMBUS, 802.11, Appletalk, Novell/IPX, OBD/CAN

CAD Software: OrCad, Catia, Mentor, Synopsis, Xylinx/XACT, Pads, Protel DXP, ABEL, RUN, EDS-CAD, MatLab

Computer Languages: C, C++, Assembly, Smalltalk, Java, Perl, Tcl, Awk, ASN.1, VHDL, VeriLOG, SQL, Pro-C, Object Pascal, C#, ASP, VC++, shell, VB, VB.NET, Masm

Test Equipment: Logic Analyzers, ICE, Audio/RF/EMI Spectrum Analyzers, Protocol Analyzers (for I2C, FireWire, USB, Ethernet, SS7, IS41, GSM, 802.11), DSO s, DVM, MGTS SS7 Load Generator, INET, JTAG ICE, +custom, +others

Applications: Excel/Word/Office XP, Photoshop, Illustrator, Pagemaker, Quark, 3DStudioMax, Maya 4.5

API/Packages: MFC/ATL, COM/DCOM, WIN32, BIOS (AMI/Pheonix), Carbon, .NET Framework, DEC-SS7, TIFF, JPG, Chariot

Crypto Implementations : DES, 3DES, AES, RSA, DH, DSA1, SHA, MD4, MD5, RC4, RC5, El-Gammal, big number math

Telecom : SS7, SCCP, IS-41, CAVE, TR-45, 3DES, A4/A8, ASN.1, IS41/CDMA, GSM/MAP, AKEY OTAP

CODEC Implementations: AAC (MPEG), BRR, Custom

Compiler: Compiler / tool chain modifications for performance optimization and bug identification and resolution.

Optimization: Performance tuning and analysis (including profiling and code instrumentation) for IA32/Pentium, PPC, SPARC and ALPHA architectures at compiler (C/C++) and assembly level.

Debugging: Solid root cause isolation and debugging skills for large and small projects (over 20M LOC, over 100K files)

Porting: Solid porting and optimization skills between architectures and compilers (IA32/Pentium4, IA64/Itanium, PPC, SPARC, 68K)

PROFESSIONAL EXPERIENCE:

Systems Architect

Confidential

Responsibilities:

• Identify problem areas, and distribute and manage sub - tasks to available engineering resources (2-7)
• Specify and create diagnostics in combination of VHDL, verilog, SystemC, and C
• Redesign bus interface to correct for function and timing spec, and allow for DMA transactions build models to confirm.
• Redesign quad ported buffer for correct synchronous operation.
• Identify error sources in laser centroid measurement and implement filter for correction.
• Redesign 350 mhz hotlink packet decode/encode and negotiation protocol to correct operation.
• Correct interface to DDR ram from FPGA
• Redesign embedded firmware for reliable data delivery.
• Multiboard, multi fpga design with 4 clocks, 33-133 mhz.
• Model filter code in Matlab, and correct implementation FPGA layout in this case had to be at physical. L evel
• Port verilog / constraints from Leo Spec to Synplify/Identify environment.
• Specify test equipment and setup and maintain lab

Staff Engineer

Confidential, Hillsboro, OR

Responsibilities:

• Examine all aspects of wireless performance and implement metrics for 802.11a/b/g
• Create shell to automate DOE runs for Wireless Insite and HSPICE/PSPICE
• Examine materials properties data for typical home materials
• Debug Linux development environment for wireless set top box testing
• Design experiments for wireless performance including artificial packet loss and jitter
• Various microwave tests and measurements experiments and automation for chip, Bluetooth, antenna, and 802.x

Consulting Engineer

Confidential, Lake Oswego, OR

Responsibilities:

• Identify and isolate failures in USB end-to-end communication.
• Propose and implement remedy
• Tasks included WDM driver, embedded PPC850 ThreadX driver, and PHY level modifications work.

Program Manager / Application Engineer

Confidential, Wilsonville, OR

Responsibilities:

• Assist in debug of ASIC for printer system control problem with ethernet multiport buffering mechanism
• Identify potential beta sites, execute NDA, and provide and support pre - release product.
• Report on customer experience with product
• Gather, test, and report bugs back to engineering
• Design printing solutions for customer for non-off-the-shelf supported hosts (Linux/AIX/Tru-64/Solaris)
• Maintain portions of customer support web site (Perl / C / Awk / shell)
• Debug customer problems with PCL, PS, and fonts
• Examine field data for shipped products for defects in software
• Examine WHQL requirements as applicable to multifunction products
• Examine testing and failure use cases with PCL, PS, UPnP, TCP/IP, DDNS, DNS, Novel, Unix

Consulting Engineer

Confidential, Lake Oswego, OR

Responsibilities:

• On site server installations, data migration for Linux, Novell, Oracle, Exchange, and custom.
• Premise network routing configuration, installations, including T1, VPN, and DSL
• Creation of EDI / Data automation programs and connectivity issues resolution. (C# / VB.NET )
• Root cause isolation of application problems at customer sites.
• Implement configuration management for this and other projects in CVS and ClearCase
• Assorted scripting for testing and build automation (MAKE/KSH/PERL/AWK)
• Embedded TI DSP (24x/240x) in signal synthesis for medical application (C/ASM Firmware, UML)
• Develop binary profiler tool for 24x execution coverage testing (C++)
• Develop and debug HC11 communications code to DSP nodes.
• Communication protocol modeling, UML documentation, state machines, and sequence diagrams. (ROSE)
• 501K report preparation for Confidential
• File system design and implementation
• Failsafe design and review for medical application.
• Altera PLD design review / modifications for glue logic
• SSL build + debug for remote access
• Root cause isolation in battery powered device startup and end of battery life issues in analog/digital circuit.
• Software Configuration Management in CVS
• Assorted scripting for testing and build automation (MAKE/KSH/PERL/AWK)
• Prototype GUI in ATL/ Visual Studio (C++) for handheld device
• Design review of TI DSP (24x/240x) in wireless multi node DSS network (C/ASM)
• Sound sampling and compression code for realtime wireless network transmission.
• 16bit Mitsubishi CPU - firmware for handheld remote control, including LCD graphics, keypad scan, low power code, and RF link layers, and error control.
• 16bit Mitsubishi CPU for DSS network bridge to serial protocol.
• Flash file system design and implementation (for sectored FLASH).
• Windows application for testing, flashing, and controlling DSS network bridge.
• Test harness and verification for ASIC verilog in modelsim for serialized memory access / cache
• H8 APCI / I2C - 800+ node monitor, multi-master I2C, remotely flash-able for NUMA-Q system (C/C++/Asm)
• SNMP on IA32 based node controller (C/C++)
• SSL/HTTP interface on IA32/VxWorks (C/C++)
• JAVA compatible interpreter implementation for H8 (C/C++)
• Multi drop serial network across multiple H8's and x86's - (VxWorks / C / ASM )
• EFI debugging under IA64 (McKinley CPU)
• Pheonix BIOS code review for use with APCI (IA64)
• Synopsis review of several network node ASIC s for integration with H8/APCI system
• Board Support Package (BSP) for VxWorks PPC, and x86 custom hardware
• Rational Rose UML / Use cases for network transactions between CPU clusters
• Software Configuration Management in SourceSafe/ClearCase
• Assorted scripting for build automation, firmware download, and test (MAKE/KSH/PERL/AWK)
• Develop network test code tool bench with GUI in Visual Studio (C++)
• Implement Software Configuration Management in PVCS cross platform (WIN/MAC/LINUX)
• Assorted scripting for build automation, and test (MAKE/KSH/PERL/AWK/MKS TOOLIT)
• Cross Platform implementation of RSA, MD5, DSA1, SHA, El - Gammal, and 2 custom streaming ciphers
• (Assembly language, C/C++ port from IA32 to PPC and 68K)
• Cross Platform implementation content protection / media rights management system
• Code execution analyzer for PPC PEF container and modifier.
• Relinking binary editor for PEF containers
• Certificate signing / verification code
• Big number math library port from x86 to PPC (over 70 functions, assembly / C)
• AAC (MPEG4) codec port to PPC and 68K from x86 ( C/ASM )
• Tamper resistant code technology development.
• Power PC (PPC) assembly/C/C++ media rights library conversion from x86 to 68K and PPC.

Sr. Software Engineer / Project Manager

Confidential, San Jose, CA

Responsibilities:

• Design light weight, fast, multi - tasking environment on digital / Alpha OSF (UNIX) platform
• Develop test applications for encryption, and server loading in Visual Studio (GUI/C++)
• Design ORACLE caching mechanism to allow for 100 x transaction speed improvement over pure ORACLE. Implement shared memory interface over multiple CPU s and processes.
• Modify existing older products for error logging, and code coverage / fault diagnostics.
• First ever implementation of TIA TR45 encryption and authentication algorithms for network side. Installation and debug at multiple Telco NOC s - Including Korea Telecom, PowerTel, and Pacbell
• Digital SS7, IS-41d, GSM
• ASN.1 coding of IS-41 and GSM map messages.
• Design fault-tolerant TCP/IP based interprocess communication mechanism
• Implement build system using - makefiles / SCCS / Razor version control
• Maintain UNIX (OSF and SOLARIS) environment and tools for development group.
• Shell / Perl / Awk scripting.
• ORACLE forms debugging and external procedures.
• ORACLE server tuning for maximum transaction speeds.
• ORACLE OCI / ORACLE C/C++ interface to server application.
• Maintain software configuration management / defect tracking system in RAZOR, SCCS, and ClearCase
• LAN strategy and debug (NT/DNS/SMTP/FIREWALL/BACKUP/TUNEING).
• Glue various data interchange formats from Ericson, Lucent switches - together over multiple platforms (EDI/ASN.1)
• Debug and tune implementation of SS7 IS41 to GSM router, for encryption and roaming.

Consulting Engineer/Partner

Confidential, Aptos, CA

Responsibilities:

• Strong encryption product for NT - including public/private key management
• Fault tolerant transaction design with rollback and commit.
• Device driver / Kernel level code under NT (Visual C++ 5.0 / VC 1.52/ MASM )
• Support applications and management GUI in Visual Basic / VC++

Sr. Systems Engineer

Confidential, Cupertino, CA

Responsibilities:

• Reverse engineer NTFS (NT File system) and develop prototype for use on Mac OS.
• Resolve deadlock issues in AppleShare/IP File Server (C/C++/Pascal/Asm)
• Operating system and ROM fault diagnosis and rework.
• Port sections of OS code from 68K to PowerPC
• Convert entire ROM / OS build to new abstracted header system. (68K / PowerPC asm)
• MAC OS, Enabler, and ROM building for debug and fault testing.
• Oversee any check - ins to system code base and verify correctness. (All system code including boot)
• Develop tools as needed for MACOS and ROM builds. Develop custom XCOFF / PEF linkers and relocators.
• New PowerPC system H/W and O/S bring up and debug - Development of C/Assembly code and use of DSO and logic analyzers as needed for failure diagnosis and resolution.
• In corporate new features into Open Firmware (IEEE 1275, Forth).
• Assist in Open Firmware system boot code drivers.
• Develop diagnostic code on new PowerPC hardware for various ASIC (assembly/ C)
• Development of serial drivers for CHRP platform. (C/PowerPC/68K)
• Bug rework in various toolbox components, including Open Transport networking, QuickTime multimedia, code fragment manager, device Support Layer (DSL), script manager, and alias manager. ( 68K / PowerPC assembly/ C )
• Coding and debug activities in MAC OS GUI ( C++)
• Consult to library/loader implementation group.

Consulting Engineer

Confidential, Los Altos Hills, CA

Responsibilities:

• Develop application for scanning, examination and archiving images from X - RAY densitometry scanner. (version for MAC, and NT - C++/MPW/Visual C++/CodeWarrior/OOD)
• Code for near real time enhancement of images under user interaction. (Scroll/ Zoom/ Filtering / Measurement)
• Application front end interaction with remote SQL database for archive/retrieval of image.
• Extensive TIFF / JPEG encoding/decoding. (C++)
• Mac O/S video drivers for accelerated DSP video engine. (C)
• Bi Linear zoom code for DSP. (PowerPC asm / TI 320 Asm / C)
• Network interface to SQL database. (TCP/IP, C, Sybase, 4D )
• Develop Adobe Photoshop plug-in (C++/PowerPC)
• Examine design of SCSI RAID controller device. (RTOS / C/ Asm/ MIPS 4600)
• Debug vendor s (DOME Imaging) imaging firmware
• Develop device drivers under Windows 95 for virtualization of high speed serial I/O
• (x86 assembly, C, SoftICE, CodeView)
• NT device driver development including kernel level debug and DLL s.
• Benchmark testing of driver and development of test suite for verification.
• Develop serialization and installer code for final product. (Installshield + custom)
• Develop/debug postscript stochastic print rendering engine for asymmetrical multi processing environment. (PowerPC asm / /C++)
• Debug MacApp code for configuration application.
• Add and debug CMYK - RGB color space conversions with correction matrix to driver
• Driver speed optimization for large output printers - 120 x 120 - HP, Confidential & Versatec. Split driver to run on multi processing environment.
• Generate and run test suites and output comparisons.
• Optimize driver performance across multiple CPU s
• Develop GUI and control code in Visual C++/MFC under NT and Windows 95 for densitometry scanner.
• Cross development for Macintosh power PC (Visual C++, MPW)
• Develop instrument / control channel I/O architecture and class libraries (VC++)
• SCSI driver development for Win 95, NT and MacOS (SDK/DDK/C/Asm)
• Debug of SCSI target device firmware and state machine. (C/ Asm)
• Debug of image processing hardware/firmware on 56K DSP
• Use of Standard Template Library (STL/C++)
• Develop mac native scanner control code (GUI / MPW / CodeWarrior / C++)
• Develop installer code for product (Both MAC and NT / 95 )
• Port of DNA (GEL) image analysis code to MAC platform under cross environment ( Visual C++ / XVT )
• Resolve EMI/EMP issues on argon laser in scanner on startup.
• Work with SQA for bug resolution.
• Consult with marketing on design features
• Provide Network, NT and MAC support

Sr. Staff Engineer / Group Manager

Confidential, Cupertino, CA

Responsibilities:

• Development of assembly level code coverage tool for software fault diagnosis.
• Design and development of Dallas 1 Wire to ADB bus bridge implemented in 8052 uC.
• Network Interface to SQL Database (Ingress / Sybase)
• Design of shop floor data collection and work tracking system for process control, utilizing LON / NEURON Chip technology from Echelon, embedded 52 core, and high level application interface on MAC. Development of protocol engine and control layers.
• Printer device driver code for bar - code label printer.
• Work as consulting engineer with tester design groups.
• Work with compiler group in resolving compiler code generation bugs.
• LabView code development and data collection activities for characterization of system components and failure modes.
• SPICE analysis of load device and modifications for higher power.

Staff Engineer / Project Manager

Confidential, Campbell, CA

Responsibilities:

• Manage small group of engineers and technicians for test equipment development.
• Develop test vectors for VLSI ASIC devices from VHDL models, and implement diagnostics.
• Evaluate and develop in - house use of CAD tools.
• Research and implementation of test technology for various products.
• GPIB based programming and custom hardware design for data-acquisition, in evaluation of failure mechanisms.
• Design of video drivers for MAC OS (Both embedded and OS parts, MPW, C, 68K Asm)
• Diagnostic development for ASICs on Macintosh system boards. (MPW, C, Asm)