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Engineer Principal Resume

Anaheim, CA

SUMMARY:

  • Hands - on with embedded software development life cycle of DO-178, DO-254, telecommunication-transport cross-connects, multi-media settop-boxes, asic-verification, satellite-rf-modems, and GPS-receivers.
  • Systems have been multi-threaded single-/multi-core systems, (embedded) Linux Fedora / Ubuntu / Red Hat / RTOS / Android, and bare-metal, programming-languages C, C++. System-level programming and Board bring-up. 10+ years in agile-scrum working environment.
  • Rapid proto-typing.
  • Seasoned with development of fault-tolerant systems, wireless, Wi-Fi, and optical communication product development.
  • Developing, implementing, and testing of security and HDMI / HDCP code on multi-media products like settop-boxes, including secure download, code-signing, encrypted transport-streams, display-driver, video over ip, video on demand (ITU H. 1 / 762, H. 2 / 263 / ( 5, G.711, QPSK / QAM / OFDM Demodulators)
  • Efficient usage of debugging-tools (MTC manufacturing test code, Eclipse, Tornado, kdb, kgdb, gdb, gdb-server, probe, vision-click debuggers, ice, ide) & revision-control (git, svn, gerrit, ClearCase, ClearQuest, Jira,SEGGER,Keil).
  • Worked within ESD-compliance labs, usage of oscilloscopes, meters, JTAG-debugging, logic-analyzers, Wireshark, LabVIEW.
  • Successful in building & managing highly effective teams of engineers. An excellent reputation as communication-interface among software, architecture, hardware, & asic-development, manufacturing, as well as marketing / customer-service.

WORK EXPERIENCE:

Confidential, Anaheim, CA

Engineer Principal

Responsibilities:

  • Developed multi-stage boot-loaders for multi-processor system with both space and time-constraints.
  • Prototyped on variety of development-platforms.
  • Ported and tested mathematical functions for both soft- and hard-implemented FPU.
  • Developed software to implement memory protection unit (MPU).
  • Implemented python-scripts to generate HAL-driver-software in C++ to interface with middle-ware software.
  • Identified root-causes in tool-chain and asic-design during asic-verification.
  • Created and reviewed derived requirements.
  • Identified suitable test-cases for derived requirements.

Confidential, San Diego, CA

Embedded Software Engineer

Responsibilities:

  • Software-development using Xilinx 2017.4 Petalinux and SDK (bare-metal/standalone and FreeRTOS) for ARM cortex A53 and R5.
  • Integration of radio-interface incl. power-up, bus enumeration, association, connection, d-transfer, and configuration/monitoring.
  • Using threads, timers, interrupts to handle blocked situations.
  • Created and used Python-scripts to convert c-code into C++ -code required by end-client.
  • Used Python to create source-code for test-software of radio-interface apis.

Confidential, San Diego, CA

Staff Engineer

Responsibilities:

  • Design, Implement / Test of bare-metal boot-loader, manufacturing-test- and flight-software for multi-modem rf-payload with RTEMS-4.10/4.11 operating-system, incl. watchdog, heartbeat, telemetry, health, activity-plan, in-flight-upgrade, board-bring-up.
  • Created and executed acceptance-test-plan. s included CAN, PCI, SPI, DRAM, AMBA, Ethernet, MAC, USB, EDAC, MRAM, SRAM.
  • Target-architecture: ARM Cortex, Sparc.
  • Centos/Red Hat/Ubuntu.
  • Agile/Scrum environment. C, C++ -language. Fault tolerant software component specified and developed: redundant software image in satellite, dual-boot, boot-recovery, in-service upgrade, and remote-login. Used timers, threads, and interrupts to handle blocked calls, implemented exception handlers, implemented back-up and restore procedures. All work successfully completed according to DO-178.

Confidential, San Diego, CA

Consultant Engineer

Responsibilities:

  • VLSI-verification for ARMv8 based processors Snapdragon SDM835/SDM845, both pre-silicon and post-silicon.
  • Responsible and working on (boot-procedures, timers, EDAC/RAS, MMU). Using python to create scripts for test automation and code-generation, e.g., extracting relevant data from TRM's. Debugging low level software and hardware issues, implementing bare-metal drivers, Linux, and test content. Agile/Scrum environment. C, C++ -language.
  • ARM-assembler.
  • Established recovery from errors due to different execution-levels on ARM processors, tracking hardware and software state using ARM state machines.
  • Implemented exception handlers.

Confidential, San Diego, CA

Staff Software Engineer

Responsibilities:

  • Embedded firmware-development on MiPS-32 Dual Core (DCX3635) and ARMv7-A Dual Core (DCX960). Identifying and solving issues in software due to different alignment between MiPS and ARM. Development platform is Ubuntu-14.0 and Fedora 20, cross-compiler is gcc 4.8.4 and OS for target is Linux 3.1 . Board bring-up.
  • In manufacturing-test-code for factory, implemented power-safe modes for ip-settop-boxes, this was time-critical, because otherwise mass-production could not start.
  • Integration-tested Wi-Fi communication among server and client units.
  • Implemented check-pointing, redundant-boot-loaders, software-fault-recovery mechanisms in Linux (partially in Android 1.0, 2.2) environments.
  • Tested security at Linux kernel, secure inter-process communication, and application signing.
  • Team-member of 1 st integration of DRM client into DCX36xx settop-box server and media framework, player-architecture. Performed in MoCA network with three client settop-boxes.
  • Ported MTN release from Broadcom to deliver audio/video content on ARM settop-box for multi-media demo (3-dimensional video, DCX3400) (G.711, H. 2 / 263/ 5, QPSK / QAM / OFDM).
  • Performing static source-code analysis with Klocwork 9.1, 10.3, and Coverity 8.0, not only to find potential issues in own code but also in 3 rd -party / open-source / multi-vendor code. Applying techniques to reduce false positives and identifying actual issues.
  • Firmware did not support 2 nd -source NAND-flash vendor components, which manufacturing had put onto manufactured boards, i.e., boards would not boot up. I ported device-driver from NAND-flash vendor onto hardware-platform which utilizes this NAND flash to allow board bring-up.
  • New hardware release contained modified GPIO settings. I ported and tested chip-vendor specific second-stage boot-loader onto hardware-platform (CFE) to allow successful board bring-up.
  • Led integration-team of software- and hardware-engineers to identify root-causes at cable-company warehouse/staging-laboratory why out-of-band communication with head-end did not work, so helping cable-company to successfully install thousands of settop-boxes in their warehouses across the U.S (QPSK / QAM / OFDM, H. 3 / 5 ).
  • Trained development engineers in usage of Linux (Fedora, Ubuntu, Montavista, VxWorks RTOS), who came from a Windows-XP / VxWorks background, incl. target-debugger-toolchains (gdb) to make them effective in new development-environment
  • Firmware-design using Rational Tools, Firmware-development and - integration-test (Tornado, C, C++, I2C, SPI) of digital set-top box products. Focusing on Controlled Access (CA) and Digital Rights Management (DRM), smart-card interfaces, security, MediaCipher, NDS encryption. Integrating Internet-protocols into set-top-box for home-networking and return-path functionality (VxWorks, C++). Debug with VisionProbe / VisionClick.
  • Worked on systems which used PHP, HTML5, CCS, and JavaScript, python (Red Hat, Fedora, and Ubuntu).
  • Developed and Debugged C++ code at XG1 settop-box to find out why HDCP-receiver-keys at HDMI-input were not read correctly. Additional challenge was that both component and composite audio/video output were still required to work, too. (G711. H.262/3/4/5)
  • Identified root-cause of corrupted ubifs filesystem at IP810 settop-box, where sw-upgrade was in-compatible with existing ubi-fs.
  • Upgraded GreenPeak RF4CE driver software at IP815 settop-box, performed functional tests with RF4CE remote-control equipment.
  • Integration tested HDMI / HDCP 2.2 code in Product-Development-Kit (PDK) on IP810, DCX960 settop-box products, to verify that new HDMI / HDCP version is being correctly supported. Had no more chance to test locality-check. (G711. H.262/3/4/5)
  • Weekly checked NVD (National Vulnerability Database) to find potential issues which might impact attack vector source-code vulnerability. E.g., I had filed Jira-ticket for ShellShock in Bash-shell, before manufacturing in Taiwan had informed product management in U.S.
  • Learned about MIPI standards for camera interface during lunch-break.

Confidential, Oceanport, NJ

Senior Network Architect, System-Engineering

Responsibilities:

  • Developed 4-Fiber-Bi-directional-Line-Switched-Ring - restoration core-architecture for cross-connect, which was deployed in optical transport-network. Kept hardware-& timing-constraints in mind. Applied Rational’s phase-iteration, process-work-flows. Used Shlaer-Mellor to model object life-cycles.
  • Designed, implemented, tested synchronization-subsystem of cross-connect, incl. extensive software-tests (unit, integration, system-verification) and for network-synchronization (C++, Java: BITS/Stratum-2/3e clock-distribution, detecting / avoiding timing-loops, directed graph algorithms, Tornado), incl. patent-submission.
  • Trained staff with my expertise / experience at SONET/SDH/PDH-test-equipment (Acterna ANT20/10, Agilent Omniber, Tektronix OTS9000, IXIA 1600T, W&G PF45, HP-CERJAC, TBerd TTC6000, ANRITSU, Spirent, Agilent QARobot/Routertester),oscilloscopes, GPIB-interface. SONET-rates: OC-3 to OC-192; TCL/Expect.
  • Defined / implemented jitter-/wan der-test-environment, trained development engineers in theory & usage (remote testing, Acterna, Agilent, logic-analyzers, oscilloscopes). Hardware-integrated BITS into cross-connect. Advised mechanical, NEBS, & software engineers to integrate control interfaces. Installed & provisioned GPS-receiver for PRS-quality-level availability. Provided regional RF & EMI standards-documents (IEEE, IEC, ETSI, ANSI, and ITU-T) for validation.

Confidential, San Jose, CA

Software Engineer

Responsibilities:

  • Designed, coded, tested diagnostic-software for SONET/SDH pointer-processor asic. Performed asic-verification with Confidential .
  • Defined, reviewed, executed test-suites to verify correctness of system-behavior of ISR3303, including UPSR-functionality. Interoperability-tested ISR3303 product (Fujitsu, ECI). Used Spirent & Acterna equipment to verify standard-conformance of ISR3303 product with generated/monitored traffic.

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