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Sw Engineer Resume

SUMMARY:

Embedded firmware engineer with over 24 years of experience in design, development, implementation, and deployment of largescale coding projects. I also have experience in configuration, debug, and support of datacenter grade smartnic solutions primarily used as part of an SDN or NFV environment to provide full network offload capability to host servers generating data throughput at 25, 50 and 100Gbps.

SKILLS & ABILITIES:

Programming Languages: C, C++, Visual Basic, Python, Intel and ARM assembly, entry level GO, Shell Scripting

Operating Systems: Linux 4.x 5.x SMP kernel, Centos 7.x - 8.x, MS CE 6.0, MS CE 8.0, VxWorks, QNX, Lynxos

Technologies: Openvswitch (userspace control/data planes using dpdk) SR-IOV networking models, QEMU/KVM hypervisor and libvirt VM virtualization Docker containers, Docker Desktop, Virtual Box, Vagrant USB 2.0/USB 3.0 host and device, EHCI/OHCI/XHCI, BLE 4.x, GATT, GAP, Multi-beacon 802.11x, Wifi-Direct, NFC( card emulation model), TCP/IP

PROFESSIONAL EXPERIENCE:

SW Engineer

Confidential

Responsibilities:

  • Developed automated cross-compile (x86 64 to Arm64) build environment for Broadcom smartnic solutions. Implemented Jenkins CI/CD job using docker containers and Centos 8.0 base image to automate build process to track updates to github source code repositories. Developed scripts to package build artifacts into binary rpm’s for promotion/distribution to private artifactory repos using docker containers.
  • Ported Broadcom smartnic solution from ovs-dpdk 2.10-17.11 to ovs-dpdk 2.13-19.11. Debugged issues with Broadcom poll-mode driver related to hw resource manager, tx/rx queue allocation and virtual function ring management. Created hostside northbound python application to automate virtual function allocation and tx/rx queue management based on text input file.
  • Extended openvswitch dpdkvhostuserclient support for asymmetric mappings between virtqueues and hw queues . Tested mappings in single host, multiple network namespace configuration and multiple host, Vxlan/Vlan lab environment
  • Benchhmarking raw data throughput, data drop rate, Vcpu and physical core utilization rates under various SDN network topology constraints (PP, PVP, PVVP in both single host and dual host configurations with and without external load generators). Created recommendations for smartnic production configuration based on host memory requirements, numa topology, available physical cores, pf/vf multi-queue support, host hyper-threading capability, and vm/container virtualization methodology. Usage of various opensource, industry standard benchmarking applications such as netperf, Iperf, wrk, nginx, vsperf, and Ixia network.

FW EngIneer

Confidential

Responsibilities:

  • Developed UEFI BIOS, power on reset code for USB3.0 xhci host controller.
  • Ported usb host controller driver from a pci-config based implementation (intel ICH5/ICH7 boards) to an SOC memory mapped implementation (arm cortex a7/a8 SOC) including Linux device tree node configuration.
  • Developed power tracking algorithm for system wide usb devices based on unit load requirements in device configuration descriptors. Used this algorithm to enable/disable low power modes based on load applied by attached devices.
  • Designed overcurrent switch control layout (physical layout implemented by formatter board layout team) to allow programmatic control during overcurrent condition response and facilitate system control of port current draw. Coded programmatic control in onboard hub device driver, external hub driver and host controller device driver.
  • Discovered hardware bug in ccid card reader solution which was presenting as intermittent reader failure in secure government customer environments. Triaged failure to OEM vendor incorrectly handling SPLIT transactions on USB.
  • Failure analysis of reader showed floating ground plane resulting in reader failure when static discharge built up on security card insertion to reader. Coded a firmware heartbeat on embedded host systems and implemented out-of-band reset that could detect the failure condition and restart reader in background without full system restart. Install base of ccid reader solutions was over 10,000 units saving over 4 million dollars in reader replacement costs.
  • Implemented board support package for Broadcom/Cypress semiconductor composite mode Wifi/BLE module. Integrated 3rd party Bluetooth protocol stack into system and implemented an abstraction layer between OS and protocol stack. Modified low level HCI protocol to account for OEM bug where packet headers were corrupted when data length fell on packet boundaries.
  • Implemented multi-beacon advertiser mode where multiple BLE beacons are interleaved from one BLE address-able device, Implemented support for both connectable and non-connectable multi-beacon formats. Provided RSSI calibration measurements for 1 meter hemisphere so secondary devices could enable proximity detection. Also coded management support of multiple tx power levels to allow tuning of beacon receive strength for different customer enviroments.
  • Implemented rs232 proprietary protocol for Radius Networks radbeacon device. This was lesser cost solution than full Wifi/BLE module solution but only provided non-connectable beacon support. Also coded communication device class (CDC) driver for the radbeacon device. Developed device firmware upgrade (DFU) module and driver to enable customer upgrade of radbeacon OEM firmware.
  • Implemented NFC (card emulation model) communication using ndef message passing and connection-handover protocol to allow for printing over mobile devices to wifi/wifi-direct micro access points. Also implemented runtime ndef message checking to validate passed message prior to initiating connection-handover.
  • Developed IrDA device drivers to allow I/O over infrared using Confidential developed Ir dongle. Implemented IrLAP, IrLMP, TinyTP and Obex support protocols.
  • Implemented multiple logical channels (MLC) and 1284.4 over usb communication protocols in (printer as a usb device) communication model.

Sw Engineer

Confidential

Responsibilities:

  • Served as a member of the Confidential . Initial responsibility was to prototype software Confidential compression for raster images as a means to save embedded system memory (compressed images could also be passed to a hardware decompression unit as pages were printed).
  • Several patents and trade secrets were obtained from this work.

SW Engineer

Confidential

Responsibilities:

  • Served as a member of Printing Subsystem Performance Team.
  • Job duty was to analyze/identify system performance bottlenecks of LaserJet printer board electronics and embedded firmware. This included assessing processor performance, caching strategies/sizes, memory latency, and any firmware overhead.

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