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Ecad Contractor Resume

SUMMARY

  • 20+ years (5 years of Medical Technology; 3+ years of Aeropace; 12+ years of Telecom) boards designs layout using Cadence Allegro tool (up to version16.6) for modules, constraints setup: auto / manual routing hi speed & HDI, manual route on RF, powers, mixed signals boards, all under EMI shield, DFM, DFT guidelines per IPC and/or Mil specs;
  • Signal Integrity on pre/post layout board, performance analysis & simulation, include custom ibis/spice modeling for match trace length & crosstalk; Build Allegro footprints using LP Wizard & Orcad logic symbols, schematic entry.

TECHNICAL SKILLS

Software tools: Orcad Capture CIS, LP Wizard, Cadence HDL, Allegro expert 16.6 in Windows, SigXplorer, Spectraquest; Mentor Design Architect; Mentor Board Station; ScratchPad ; ICX 3.0.01; Hyperlynx 7.1; Spice; Matlab; VHDL codes; Model Sim; Synopsys synthesis; QuickSym II; Assembly; C++; Perl; Skill; Cam350, Valor NPI. Microsoft office tools like Word, Excel, PowerPoint and outlook.

Seminars: Allegro High - Speed Constraint Management v16.6-2015; Hi Speed design for manufacture; Orcad Capture CIS; IPC C.I.D.; Asic design using VHDL & Synopsys synthesis tools; Mentor Board Station; Hi speed Electrical Design using IS (ICX), Sigrity SpeedXP Power SI (Power signal simulation).

PROFESSIONAL EXPERIENCE

Confidential

ECAD Contractor

Responsibilities:

  • Design layout form fit to new mechanical box, constraints setup and route 8 layers Power Distribution Module (MCUs with 4 channels hi currents MOSFETs) for harsh environment using Allegro 16.6 and Valor NPI check on finish board.

Confidential, San Diego

Lead Designer

Responsibilities:

  • Infusion pumps Trident project: Design layout Trex & NRBL Control 12 layers boards using Cadence Allegro 16.5;
  • Apollo project (new infusion pump) Bedside Control board HDI design (use blind buried, microvia) 14 layers board with hierarchical CIS schematic Allegro16.6;
  • M3 Mercury Control 12 layers board, Fluid Delivery 12 layers, M3 Development Camera 8 layers board.
  • All boards are impedance hi-speed constraints, DDR buses, EMI mixed signals design with new form factors to fit in new mechanical Solidwork models from Mechanical group, boards are design per IPC & Jabil’s manufacture standards.
  • Update ETCO2, SPO2, SIO power NELCOR and MASIMO production boards to current by convert SCALD Concept schematics to Orcad CIS with all ECO added, do association, run netlist compare & fix all schematic & boards errors.
  • Convert UK Orcad Layout max. boards to Allegro boards.
  • Build schematic symbols using Orcad CIS 16.3 - 16.6, logic components building, train & assist librarian both Orcad schematic & allegro footprints use LP Wizard, train other designers in hi-speed design using Allegro Constraint Manager setup and entry.
  • Interfaced with design engineers on layouts PCBs for digital, RF circuits, and Wi-Fi.
  • Wrote company guidelines for BGA footprints, RF and HDI design best practices; Orcad CIS standard user; CIS admin; Convert Orcad Layout to Allegro board; Allegro 16.6 Hi-speed Constraints user guideline.
  • Perform peer check for other designers on new build logic symbols, footprints and post process boards used Cam350.

Confidential, San Diego

ECAD Analyst Contractor

Responsibilities:

  • Infusion pumps Trident project: Design layout Trex & NRBL Control 12 layers hi-speed constraints impedance boards using Allegro16.5;
  • Build schematic symbols using Orcad CIS 16.3 - 16.6, logic components building, train & assist librarian both Orcad schematic & allegro footprints.

Confidential, San Diego

Sr. Designer

Responsibilities:

  • DGAS (Directional Gamma Auto Spectrometer) hand-held instrument project: Rigid flex boards system design & layout.

Confidential, San Jose, CA

Sr. Designer

Responsibilities:

  • Participate in the design of 2G SODIMM, 4G DDR-II RDIMM, FB-DIMM using Ball, Rainier stack package, AMB VLP DIMM, use Sigrity Power SI simulate transient (optimized decoupling caps placement, type, values)& power distribution (IR drop) for pre & post layout of DIMM boards also do team routes (Dallas location) using Allegro Expert 15.2/Orcad as schematic entryLitton Guidance Control Systems, Woodland Hill, CA
  • Design LN-1206 Internal Card; Update design change on MH-60 Multiyear Video card; Design Rigid flex Mobile Magu Risa Electronics (9/05) using Allegro 14.2/Orcad as schematic entry

Confidential, Redondo Beach, CA

Sr. MTS III

Responsibilities:

  • On Advance Extreme High Frequency (AEHF) program, RDE for Circuit Routing Fabric board. Prepared & do Internal Design Review: Evaluate & select parts.
  • Do circuit blocks, system flows diagrams, boards interconnect, ASIC (PBGA) pins assignment & routing constraints for PDE to do schematic, board layout; Use ICX to verify routed board timing
  • Interface with Asic designers for multi-board timing, cables interconnect; JTAG vectors
  • Write worst case analysis distributed mesh models) in Hspice to measure VI drops on ASIC's power pins.
  • Participate on RF, Analog, Digital Circuit design, RF Transmitter/ Receiver design from 10 MHz to 44 GHz.
  • Design and development of channel emulators for Wi-Fi and LTE. Designs included analog, digital and RF circuits.

Confidential, Sarasota, Fl

Sr. CAD Design Specialist

Responsibilities:

  • Design high density multi-layers boards, smt fine pitch devices per IPC specs. Build logic & physical symbols using Allegro, Concept & HDL. Write scripts, Skill to extract schematic, board properties.
  • Define board geom., materials, layers stack-up, component placement interfaces. Define properties & run Signoise analysis on pre & post boards.
  • Provide estimates, schedules & work plans. Maintain 3 libraries both CAE & PCB footprints in Orcad, Cadence Unix & NT.
  • Complete design (from prototype to production) Global Star receiver & transmitter boards with mechanical shield housing & pc boards modules
  • ICO L Band up-down converter boards; PCI APM Tone Range Mezzanine; VME Multi-Function Telemetry; OS90 Bridge/Carrier; Netstar Demod Mezzanine; VME Bus Hotlink I/O module; DPU II; M ulti channel USCA; PMC Bit synch; PIO Hot Link.

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