Sr Consultant-Member of Technical Staff Resume Santa Clara, CA - Hire IT People

SUMMARY

10+ years’ experience in designing, developing and putting complex electronic designs into productions (analog & mixed - signal IC, imaging and security sensor ASIC, high speed SerDes & I/O, PHY, RFIC), taking active participation in all stages of product and IP developments, including roadmaps, phase definition, concept of proof, technology selection, design, and physical implementation (mask design/ supervision /verification), detailed documentation, silicon evaluation and debugging, test development support, customer support silicon validation/debugging and SoC bring-up and production ramp-up;
Hand-on design experience in all facets of chip design and solid background in analog/mixed-signal design techniques in clocking and timing ICs ( clocking generator, PLLs, VCO/oscillators, charge pumps, filters, opamp, comparators, system noise analysis, layout trade-offs, etc.), data converters (sigma-delta modulators, pipeline, SAR), high speed SerDes & Interface I/O, current and voltage reference (bandgap, regulators, LDO) in various process technologies (CMOS, SOI, FinFet, Bipolar, SiGe) ranging from 0.25um-14nm;
Expert in Cadence design and simulation (Spectre, hspice, ultrasim, finesim and extraction tools), skilled in scripting in perl/shell/python/ocean, and extensive experience in developing modeling in Matlab/C, VHDL, Verilog, VerilogA and system validation/ prototyping & functional SoC design in FPGA;
Hands-on experience and skilled Si validation and lab equipment like BERT, o-scope, VNA, logic analyzer, spectrum analyzer, probe Station, frequency generator.

PROFESSIONAL EXPERIENCE

Confidential, Santa Clara, CA

Sr Consultant-Member of Technical Staff

Responsibilities:

Developed and designed RXU (receiver unit), focusing on analog front-end (AFE), loss of signal detector (LOS), continuous-time linear equalizer (CTLE), phase-locked loop(PLL/VCO), clock and data recovery (CDR) & clock distribution networks, bandgap, voltage regulators, LDO and biasing circuitry;
Reviewed design spec and test requirements documents, worked closely with product and test engineers;
Supervised mask designers for floorplan and critical blocks layout, layout extraction and simulation and verification;
Mentored junior designers, and prepared and delivered presentations for project reviews.

Confidential, San Jose, CA

Sr. Staff Engineer

Responsibilities:

Developed and designed RXU (receiver unit), focusing on design CMU (phase-locked loop(PLL/VCO), clock and data recovery (CDR) & clock distribution networks), current reference and voltage regulators, LDO and biasing circuitry, working throughout design spec definition to schematic, layout floor planning and layout supervision, extraction and validation, EMIR check. .
Conducted design reviews and documentation, reviewed methods appropriate to develop new circuits and select best method of achieving desired performance and functional goals;
Mentored senior and junior engineers in design, simulation, layout, and verification of analog mixed-signal blocks, and supervised layout engineers and provided physical design guidance for better electrical performance ;

Confidential

Staff Scientist/ Principal Electronic Engineer

Responsibilities:

Designed and developed innovative sensing systems, with focus on imaging performance from the pixel through the analog readout circuits such as high-speed low-noise multi-channel charge-sensitive preamplifier, high-speed multi-channel Readout for Solid-state photomultiplier (SSPM), low-power low-jitter high-resolution DLL/PLL-based Time-to-Digital converter (TDC), and low-power high performance A/D Converters
Developed and developed analog and mixed-signal custom circuits with an emphasis on analog pulse processing and the timing thereof, including design of electronics interfacing to both photomultiplier tubes as well solid state APD and SiPM photon detectors.

Confidential

Project Lead- Sr. Analog/Mixed Signal Engineer

Responsibilities:

Performed detailed circuit designs on analog sections on Pressure/Temperature Sensor ASIC and layout supervision, including critical designs of low noise amplifiers, low noise switched capacitor or OTA-filters, band-gap, precision voltage & current references, LDO regulators, charge-pump, low jitter VCO/PLLs, A/D and D/A Converter;
Coordinated and documented design review activities, conducting silicon prototype test and lab evoluation, completing chip characterization and test plan;
Worked collaboratively with board design team to completd the hardware design of PCBA, including the circuits, PCB layout and board level testing simulation.

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Sr Consultant-member Of Technical Staff Resume

Santa Clara, CA

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