Hardware/firmware Engineer Resume

SUMMARY

Seeking employment in a growing organization wif opportunities
Objective to contribute to its success as a hardware/firmware engineer.

PROFESSIONAL EXPERIENCE

Confidential

Hardware/firmware Engineer

Responsibilities:

Communication designs in VHDL using Kintex7, Spartan 6, and Micro Blaze using ISE and Vivado.
Circuit and PCB design for robotic control using Altium and Dx designer, PADS.
Camera and laser control circuits and pcb designs.
Analog low noise design for robotic laser measurements.
Li - Ion battery charger design.

Confidential

Hardware/firmware engineer

Responsibilities:

Complex circuits (some circuits were microprocessor based), SI simulation and board (PCB) designs for MODE-S radar, linear motor control and high speed optics changeover projects.
Design and complete implementation of Radar receiver DSP algorithms in VHDL using Xilinx FPGA (Virtex 7) .
Design of linear motor control(analog and digital) for medical instrumentationusing Altera Cyclone III family, Firewire protocol and PID algorithms in Verilog
Design of an antenna dipole measurements and RF S-parameter component measurement programs in Labview .

Confidential

Hardware/firmware engineer

Responsibilities:

Design and implementation of communication DSP signal processing algorithms 802.11a (OFDM) and 802.16a (WiMax) using VHDL and various cores for wireless transceivers.
Design and implementation of PCI-x to/from SATA bridge.
Transceiver designs included integrating ARM 7/PowerPC 405 controller on a chip, implementing MAC interface as well as interfacing to DAC/ADC.
High-speed circuit, SI simulation and pcb designs for a transceiver project .
Communication designs in FPGA’s(Xilinx Virtex4,5,Spartan3) and Altera (Stratix 4) in VHDL using multiple clock domains, power saving features, etc.
Performed initial board debug, bring-up, and improvements to board performance.
Hardware/software integration for transceiver design using Linux drivers for Power PC.

Confidential .

Hardware/firmware engineer

Responsibilities:

Performed full ASIC RTL designs from requirements through architecting, design, synthesis, verification and final product debug for new product lines. Communication designs included the design of SERDESes physical and link level transmitter and receiver designs. All designs were done in VHDL and/or Verilog. Performed functional verification and static timing analysis. Designs examples: PCI-x, HSS (high speed serial), Fiberchannel, PCI-express, various pipelines, memory and cache controllers, bus controllers(SMP, CSI), Fiberchannel and HSS designs were done using multiple clock domains.
Design of embedded real time software code for embedded me/O(Fiber channel, design scans) applications using Assembly and C (for TI DSP 320C55xx family), C and assembly for Intel microcontrollers.
Lead a small team of designers in implementation of an important IP’s (High Speed serial buses, SMP and CSI buses). Responsible for task definition and design partitioning, RTL design, synthesis, testing and verification using System Verilog and OVM.
Implemented designs in FPGA’s (Xilinx Virtex4,5) and Altera (Stratix 4) as a part of design verification.
Implemented a number of me/O algorithms in FPGA’s.
High speed circuit and pcb designs for manufacturing .

Confidential

Digital/analog engineer

Responsibilities:

Design and maintenance of embedded hardware and firmware for microcontroller applications (Intel, ARM) and signal processing applications (TI and Analog Devices DSP) in native assemblers and C/C++.
High speed digital circuit and PCB designs (VME, GPIB busses, etc) .
Optoelectronics designs .
Design of data acquisition systems.
Power motor control designs using PWM, microcontrollers and PLC’s.
Digital/analog design using discrete and programmable logic (Actel,Xilinx) and sensors for various microcontroller based products.
RF design: up/down conversions, detections, amplifications, output stages.

TECHNICAL SKILLS

Computer Languages: System C,C/C++, various Assemblers, TCL, PERL, shell scripts, Clearcase CM, VHDL, VERILOG, System Verilog, OpenVera, Labview, Specman,OVM.

Simulators: NCSIM, Incisive, Verdi, Design Analyzer, Modelsim,Simplify synthesis, Matlab,Simulink,Pspice

ASIC/FPGA tools: Cadence (SOC Encounter,Formality, Pioner, DC Ultra,Nanoroute), Crystalys, TransEDA, Synopsys(Prime time, Physical compiler, IC compiler, Apollo)

FPGA development: Quartus, Xilinx ISE.

Schematic capture: OrCAD, Dx designer, Zyken, Altium,PADS.

Layout: Altium, PADS.

Tools used: Logic analyzer, digital oscilloscope, spectrum analyzer, protocol analyzer, network analyzer, power meters.

Operating systems: UNIX/Linux(at the user and system administration levels), Windows .

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