SUMMARY:

• Robust dynamic software designs that are scalable, durable, and flexible.
• Tenacious, aggressive problem solving.
• Debugging and troubleshooting. Particularly effective in solving problems in emergency situations when given the tools and support required.
• Optimizing for high performance and real - time systems. Capable of extracting maximum performance for a given architecture using combinations of high-level languages such as Java and components built of C/C++ and assembly language to achieve performance goals. Creative use of threading in multi-processor, multi-core architectures to achieve maximum hardware utilization.
• Studious about providing useful, accessible documentation.
• Capable of building systems from the 'ground up' as opposed to just pushing the code around in an existing project.
• Deep, down to the metal understanding of many architectures, systems and platforms.

TECHNICAL SKILLS:

C/C++ Expert Level: . First language of choice for projects where it is available. Good ability to build robust, maintainable classes and make excellent use of polymorphism, inheritance, templates and exceptions. Broad, expert experience with Qt, RogueWave and STL. Have taught C++ seminars at client sites. Broad experience with most industry standard compilers including Visual C++, SunPro C++, VisualAge C++ and GNU g++ on all major Unixes.

P erl Expert Level.: Capable of developing complex but robust, flexible applications and extensions. Experience includes CGI, objects, networking, perl servers, clients, GUI with perlTk, perl internals, and embedding. Author of 'ptkdb', GUI based debugger for perl.

Python: Expert level. GUIs, database implementations, PyVisa handling of a myriad of electronic instruments

Java: Expert Level. Highly skilled at developing JNI extensions.

JavaScript: Expert knowledge and use of language features to include embedding JavaScript in applications(QtScript). Adapt at handling/creating asynchronous methods.

Linux/UNIX: Expert knowledge of OS and tools available. Experience with managing multiple process applications,sockets, pipes and building functioning client-server applications.

SQL: Proficient with Oracle, Sqlite, SybaseIQ, MySQL and Postgres SQL's including the use of stored procedures, packages and host arrays.

HTML/CGI: Proficient development of pages, scripts to include interfacing with external databases through embedded or dynamic SQL.

Rational Suite: . Expert usage of Purify, Clearcase and other code instrumentation tools. Proficient use of Rational Rose.

Threads: Expert in the use of pthreads and Java threads as well as CUDA threads/warps. This includes the use of condition variables, signals, and the use of C++ with pthreads and memory coalescing with CUDA threads. Able to construct rhobust, stable applications that best use threads to increase performance and minimize maintenance at the same time.

Multi-Processing: Deeply familiar with issues involving a multiple processor environments, both SMP architectures and distributed. Able to take full advantage of asynchronous aspects of processes involved to produce scalable solutions. Have setup and used MPI on Linux systems.

Embedded Systems: Have worked with various embedded systems and processors for various commercial and military applications to include HC11, StrongArm, TMS320C30, WinCE, PPC vxWorks and Embedded Linux.

UML: Proficient level. Familiar with many of the tools in use including Artisan, Rose and MagicDraw. Have a substantial library of UML texts with several duplicates for loans to peers to increase their depth in the material. Familiar with both disciplined processes and 'free-wheeling' extreme development.

UI Design: . Motif, Windows, Swing, Qt, Jambi, SWT, XUL, WPF, Forms, wxWidgets, wxPython, PyQt, Android, IOS

Agile Processes/Practices: . Occasional Scrummaster and Senior Contributor.

Json: . Expert usage of language. Concocted a pattern of Flask components that would clearly reflect server errors onto the browser screen immediately facilitating rapid problem isolation and resolution.

Meta-programming: Have been able to construct ‘self-defining’ components using Python, Javascript and C++. Favorite example was constructing a C++ template that would connect a C++ obj/method pair to a OSF/Motif widget with 1 line of code, replacing 9 lines of code.

Operating Systems: Linux(Red Hat, Wind River, Suse, Caldara, CentOS, Embedded linux, Android, Ubuntu, Wind River etc) Skilled at constructing linux systems from 'raw' machines to include RAID and VM configurations Unix Solaris, AIX, HP-UX, SCP, Digital Unix/Compaq Tru64, IOS,Apple MacOSX, IOSWindows( Win10, Win8, Win7, Vista, Windows XP, Windows 2000, Windows NT, Windows ME/98/95)Cygwin

Other Tools, Platforms and Suites: Agile, Jira, Confluence, SQLAlchemy, Flask, Flask-Migrate, Nginx, Gunicorn, Xamarin, Eclipse, NetBeans, Visual Studio, VMWare, JBuilder, VisualAge, VisualSlick, Emacs, Sun Studio, GNU, Valgrind, Ksh, Bash, Bourne sh, Shell Scripting, Cmd.exe, Apache, Tomcat, Acrobat, dpkg, rpm, Gnome, KDE, Qt, Jambi, Swing, SWT, X/Motif, Doxygen, Javadoc, JUnit, MediaWiki, Lisp, Ruby, Python, Clojure, CMake, CUDA, cuDNN, ArrayFire, XUL, Oracle, Sybase, MySql, Postgres, REST, OAuth, JTAG, Linux device drivers, Angstrom, Sqlite, IOS, Android, adwords, jQuery, Bootstrap, Datatables, Flask, SQLAlchemy, Flask< -- -->-Migrate, Mysql, Sqlite, Ajax, Json, OpenMP, OpenMPI, OpenCL, AWS, Starcluster, OpenCV, Continuous Integration

PROFESSIONAL EXPERIENCE:

CONFIDENTIAL

IRIS GRAPHICS

Responsibilities:

• Porting of color transformation algorithms to the Macintosh Platform. This included several optimizations at the assembly level to include low level 'parallelizations' that were capable with the Motorola 68882 floating point co-processor.
• Developed Print Manager Resource File (PMRF) or print driver to support PostScript server product for Iris Printers. This involved developing a broad base of expertise in many disciplines. These include: PostScript, imaging models,networking, as well as the standard development issues for a complex project.
• Developed low level SCSI drivers for Iris Printers and color processing NuBus cards.Have specified new architecture for NuBus card that entailed adding a 68030 controller, NCR 53C700 SCSI controller chip as well as the color processing ASIC device developed for the card. My goal was to provide a system solution that would offer full printing with

Confidential

Engineer

Responsibilities:

• Mapped a complex DSP algorithms to the Texas Instruments TMS320C30 digital signal processor. Within a month the major work of fitting the algorithm within the time line had been accomplished. This involved learning the TMS320C30, its architecture, programming, concepts, and tool set. The programming required development of parallel coding techniques in order to take full advantage of the TMSU's parallel instruction execution. These techniques enabled the use of better than 85 percent of the processors full capability during the processing of a data dwell.
• Development of a high level behavioral model for the LSI Logic L64240 Correlator. This entailed study of the device's architecture and adapting its algorithms to the hardware and operating system of simulator. In order to increase the performance of the model's calculations and make its methods closer to that of the real device, an assembly language routine was written on the Macintosh using MPW assembler and then transferred to a mentor source file as hex coded integers. This was done to gain increased access to the6888x processor present on the Mentor station, and to take advantage of the structure of the floating point data representation present in the co-processor.Development of high end behavioral model for DSP VHSIC chip while the device was in development. The behavior model was developed entirely form the chip specifications. The completed model provided the board and integration engineers with an accurate and functional model while the device was still in development, greatly expediting the system design cycle. The model is still preferred over the hardware database not only for speed, but also for providing the board engineers with ease of access to the micro code fields of the device for debugging purposes.Associate Engineer
• Scan path redesign on VHSIC signal processing devices.
• Entry and management of MRAAM (Advance Medium Range Air to Air Missile) IO chassis database. Responsible for evaluation of Mentor databases from other divisions.
• Assistant engineer on gate array redesign. Responsible for redesign of simulation and test vector generation strategy.
• Created and wrote Mentor LASAR/L200 test vector translator program. This involved obtaining knowledge of both the Mentor log file format and the LASAR/L200 test language,implementing the translator from scratch in C, and providing extensions to ease test integration and transfer.
• Engineer responsible for development of high end ASIC models for signal processing chip set. This led to the design of a tool that generates C code models from Mentor Databases. the first model produced with this tool required 6 weeks of work to integrate into the simulator (as opposed to 6 months for a model coded by hand). The next model only required 2weeks, and the last model produced required only 5 days. Eventually, with more work, this program could have produceda model in a matter of hours. The presence of these models reduced the time needed for a simulation run on signal processing modules form days to hours.Developed various aids to computer aided design. One of these tools saved Raytheon over 800 engineer man hours.
• Leading the integration of a VHSIC chip based digital signal processor for the AAAM (Advanced Air to Air Missile), and MRSR (Multi role Survivable Radar) projects.
• Actively involved in supporting all phases and aspects of computer aided design at Raytheon. Frequently called up onto solve problems related to CAD/CAE. Often tutoring other engineers in C, C++, and OCP as these languages and technologies work their way into the lab.