EDUCATION:

M.S., Electrical Engineering
B.S., Electrical Engineering
B.S., Applied Mathematics

Certifications
Mentor Graphics: Design Architect, IC Station Full Custom IC Design.
Esperan: Introduction to VHDL Based Design, Advanced Application of VHDL.
National Instruments: Introduction to LabWindows CVI, Advanced LabWindows CVI.
Synopsys: Chip Synthesis, PrimeTime.

Related Coursework
Introduction to VLSI Design
Introduction to Microprocessors & Microcomputers
Computer Logic & Architecture
Digital Computer Architecture & Design I
Digital Computer Architecture & Design II
Microprocessors & Systems Applications I
Microprocessors & Systems Applications II
Project Management & Engineering

TECHNICAL SKILLS:

Design Tools:
EMS/I: CAD/CAM; Magic: EXT2SIM; Modelsim; Cadence: LSim; Imagine That: Extend 4.0 - 5.0; Mentor Graphics: Ample; National Instruments: Lab Windows; Synopsys: Design Compiler, PrimeTime; Zycad: XPlus 6.0 - 7.0.

Hardware:
DSP\'s: TMS320 C3x, C4x, C5420; SUN Sparc Workstation; IBM PC & PC compatibles; Intergraph System; Oscilloscope; Digital Multimeter; Texas Instruments VLCT tester; UNIX.

Programming Languages:
Quick Basic; Borland C/C++ 2.0; FORTRAN 77; Mentor Graphics: ENWrite; Texas Instruments: TMS320 C3x, C4x, C5420 Assembly; Perl; Verilog XL 2.3; VHDL.

Software:
Citrix MetaFrame XP; IBM Clear Case; Microsoft\'s: Front Page 2000, Outlook 98, Project 98, Visio, Word; OPNET Modeler 11.5; Telelogic DOORS 7.1.

EXPERIENCE:

Confidential,Las Vegas, NV2007 - 2011
Chief Engineer
Developed system architecture for suturing by mimicking the surgeon's suturing techniques.

Tested various microcontrollers for ease of use, programming capabilities, pin mapping layout, and ability to do parallel controlling of stepper motors.

Created list of suppliers for all parts needed for product as well as a distribution network to supply customers as units are needed.

Completed research in suturing techniques in order to decide which were the best techniques that would be applied through technology.

Setup computer network along with software such as Pro-Engineer, and hardware for engineers and designers to be able to complete CAD models to pass along to manufacturer for fabrication.

Coordinated efforts between engineers, lawyers, and doctors in order to develop patent for suturing device.

Began Project Management Professional (PMP) certification training at UCLA.

Confidential,Anaheim, CA2003 - 2007
Engineer II
Co-trained team members for the development of Special Test Equipment resulting in a team equipped with the knowledge of developing all PCB's for a Guidance Unit.

Held meetings with the Department Of Defense which resulted in defined hardware and software requirements to be shared with the contractor and subcontractors using the DOORS database.

Participated in Critical Design Reviews and Product Design Reviews in order to assist design teams by informing them of any design defects or system failures that are being reported by customers.

Maintained C and Assembly code for functional test cases and wrote new C and Assembly code which resulted in more integrity for low level testing.

Created software programmers user's manual and test procedures documentation to present to internal and external customers.

Developed test case to strengthen confidence and test for overlapping of keeper cells and tristate buffers of GU circuit designs closing any doubts for design errors.

Developed firmware for a System On a Chip type setup for all PCB's for memory optimization, inter-processor synchronization and board connectivity.

Debug experience with JTAG pin for Digital Signal Processor and other microprocessors.
Confidential,Fullerton, CA 2000 - 2003
Fulltime Graduate Student/Engineering Consultant
Invented and modeled graphically a hierarchical method of linking software programs of different objectives for use in an Artificial Intelligence project which resulted in a proprietary technology for a private client.

Demonstrated the ability to lead a team of engineers in designing a neural network for an Artificial Intelligence project which resulted in a second contract for all participants.

Assisted with the debugging of programs and the programming of GUI for systems engineering modules required for interfacing an Intelligent Agent for a private client which resulted in an iridology identification system.

Evaluated and edited documentation for modules for a private client based on the leading edge textbook entitled "Simulation-Based Engineering of Complex Systems."

Teaching youth at local church how to produce, edit, create, and market audio and video products for any market.

Confidential, Houston, TX 1995 - 1999
IC Design Engineer
Tested TMS320 c5410 CDMA test cases against the TMS320 c5420 CDMA design to discover CDMA bug in the c5410 design which saved the company one major product revision.

Created an ASIC design kit and related design flow to test DSP cores which resulted in a new catalog product called TMS320 c5420.

Wrote and adjusted Verilog code for generic test benches, and ASIC libraries which created an automated production for the TMS320 c3x and c4x generation of Digital Signal Processors.

Generated generic RTL code to test scan chains of all cores, CDMA's, memory blocks and other peripherals which were used for build new revisions of the TMS320 c3x and c4x DSP\'s.

Organized and checked all asynchronous logic in TMS320 c5420 design to eliminate any potential timing clock domain problems (which would inhibit a first time pass design).

Created scripts using Perl, SED, Awk, and C shell in order to automate simulation, floor planning, and back annotation for verification.

Obtained certifications for Perl, Advanced Perl, UNIX, Synopsys: PrimeTime, DC Compiler, Mentor Graphics: IC Station, Design Architect, and SUN: Solaris.

Product Engineer
Evaluated and verified Flash module to ensure write/erase code was established for a certain number of cycles which convinced external customers of stability.

Assisted in the development and testing of a new tester program for Flash module on Texas Instruments VLCT tester which resulted in a faster way of testing.
Wrote SAS code to test DSP failures which enabled product engineers to redesign core modules.

REFERENCES: Available Upon Request