Senior Hardware Design Engineer Resume Salt Lake City UT - Hire IT People

OVERVIEW:
Extensive high speed hardware design experience. Used that experience in diverse industries (medical devices, industrial flash drives, video broadcast equipment, and network equipment industries).

EDUCATION:
M.S.�
B.S.

RELEVANT WORK EXPERIENCE:

Confidential�Salt Lake City, UT (1/1 Current)
Senior Hardware Design Engineer:
Led implantable medical device development team.
Developed product requirements and product design specifications for an implantable
neural processing system.
Managed multiple contractors to develop a pacemakerlike can housing, a MICS band
communication antenna, and an inductive battery recharge circuit.
Direct involvement designing the lowpower/lownoise, wireless, and rechargeable data
acquisition controller board.
Defined, implemented, and verified the onboard neural signal processing FPGA.
Extensive experience with FMECA analysis for implantable devices.
Developed an algorithm to compress neural data and implemented it within the FPGA.
Extensive experience with the Zarlink MICS band wireless module (ZL7321).
Experienced with Hotlink/Hotlink II Transceiver and Avago OC3 Multimode Fiber�
Module.
Supported neural stimulator productization.
Board bringup and debug of an external neural stimulator.
Led product through UL6611 and EN45521/EN45522 safety testing, including
EN5511 class B EMC testing.
Experience with FMECA analysis for an external medical device.
Debugged Microchip PIC based motherboard.

Confidential�Phoenix, AZ (5/1 9/1)
Senior Hardware Design Engineer:
Designed a prototype board for industrial grade SATA II flash drives (team of 2).
Responsible for board bringup and validation of the SATA flash drive.
General hardware expertise resource for other flash drive projects. Provided critical
schematic review. Performed failure analysis on inthefield PATA drives. Analyzed�
power issues in flash drives.

Confidential�Salt Lake City, UT (6/5 4/9)
Senior Hardware Design Engineer:
Experienced in system hardware development.
Completed multiple XScale and NIOS II based microprocessor based boards.
Significant experience/development with FPGA design flows (Xilinx and Altera).
Significant exposure to PCB layout techniques to achieve signal integrity and EMC
compliance in highspeed designs.
Significant exposure to manufacturing test processes and test procedures.
Extreme Networks Inc., Westlake Village, CA (8/ 6/5)
FPGA/ASIC Design Engineer:
Member of a team which completed three ASIC chips
Designed 1/1/1 ethernet MAC’s, 1G MAC, QOS (Quality of Service)
and highspeed serial translation chips.
Created entire chip verification environments; Responsible for verification plan and
implementation. Familiar with assertionbased verification techniques.
Experienced in designing multiple clock domains, high speed interface protocols
(e.g. XGMII, GMII, POS, XAUI).
Performed timing analysis (using Primetime) and performed formal verification.
Experienced in ASIC bringup and lab environment testing and debugging.

Confidential�Redondo Beach, CA (8/97 8/)
MTS: Member of Technical Staff
Electronic design team member for a millimeter wave focalplane controller board.
Designed data acquisition electronics (D/A and A/D electronics) for a focalplane
array.
Designed polarizer control electronics (mechanical relay and limit switch based
design)
Exposure to acoustically controlled dithering subsystem using TI DSP\'s.
Responsible for field integration and field testing.

SOFTWARE/CAD TOOLS/LAB Equipment:
CAD Tools Used: Cadence\'s Allegro board design tools (Schematic Capture, Board
Layout). Altium.
Embedded Software Tools: C, Assembly
FPGA Tools Used: Xilinx ISE and Altera Quartus II, SOPC builder. Lattice Diamond
Lab Equipment: Multimeters, Oscilloscopes, Waveform Generators, Power Meters etc.
Simulation Tools: LTSpice, Modelsim, Matlab
Others: PERL (ongoing...).

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Senior Hardware Design Engineer Resume

Salt Lake City, UT

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