SummaryI am a highly motivated student with a very inquisitive mind and a can do attitude. My primary interest lies in developing low power and high speed digital and analog circuits as well as device modeling and characterization.

Technical skills:

• Scientific computing: MATLAB
• Programming language: C, C++,Assembly language
• 3. Simulation languages: Verilog , VHDL
• Simulation tools: Cadence (Spectre), Pspice , Circuit Maker, DSCH
• Layout design tools: Microwind
• Good skills in MS office(word ,excel, access,visio, power point, SQL),
• Sound knowledge in flash, photoshop, Autocad , HTML, adobe illustrator.
• Good knowledge of using scanner and various computer software.
• Operating systems: Windows XP, Windows 98,Windows 2000
• Device simulation tool: Silvaco (Atlas, Athena, Devedit ),SCHRED
• 11.Scripting language: Perl

Education:
Passed S.S.C from.
Passed H.S.C.
Passed Bachelor of Science in Electrical and Electronic Engineering.
Now doing MSE in Electrical Engineering.

Professional Experience:
Worked as a grader and student assistant for the Course CEE 384(Numerical methods for Engineers using MATLAB) at Confidential.
Worked as a lecturer in Confidential from April,2008 to December,2010.

Instructed courses:
Electrical circuits1,measurement and instrumentation,electrical circuits laboratory,electronics laboratory,Pspice laboratory(both electrical and electronic circuits),control laboratory,measurement and instrumentation laboratory,numerical analysis laboratory(usingMatlab)
Developed all the laboratory manuals for measurement and instrumentation and power electronic courses.

Undergraduate thesis :
“Designing vector quantization codebook for ECG compression using MATLAB tool”

Course Work:
For MSE :

• Advanced Analog Integrated Circuits
• Power Electronics and Power Management(SMPC,PWM, Controller design of dc-dc converter, power factor correction circuits, Grid-tied PV inverter, AC-AC converters)
• VLSI Design
• Switched Capacitor Analog Design
• Semiconductor Characterization
• Fundamental Solid State Devices
• Semiconductor Process/Device Simulation
• Semiconductor transport
• Advanced Biosensor concept

For B.Sc. Engineering:
Electronic circuits I(diode, BJT), Electronic circuits II ( MOSFET , JFET,Feedback), Electronic circuits III(Op-Amp, Timer,optoelectronics), Industrial Electronics(Power BJT,Power Mosfet,IGBT,Voltage controller,rectifier,inverter,UJT,SCR,DIAC,TRIAC,Voltage multipliers,Stepper Motor control circuits,Timer,SMPS,chopper circuit,Battery charger circuit), VLSI circuits, Digital Techniques, Digital signal processing, Microprocessor and Digital computer, Measurement and Instrumentation(ADC/DAC), Computer Programming and Numerical Analysis, Signals and Linear Systems, Semiconductor Devices , Electrical Engineering Materials, Telecommunication Engineering ,Electromagnetic fields and waves,Digital and Satellite Communication Engineering, Power Transmission and Distribution, Power System Analysis, Power Stations, Physics (Heat & Thermodynamics, Waves & Oscillations,Optics, Modern Physics),Chemistry 

Completed project:
Undergraduate:

• Designed and implemented amplitude modulation (AM) radio receiver
• Designed and implemented four bit Arithmetic Logic Unit (ALU)
• Designed four bit microprocessor

Graduate:
Analog:
1 ) CMOS β-Multiplier Based Constant-gm Current Reference Current Mirrors:

• Here such a circuit was built using TSMC 0.35 µm process generating a reference current of 10 µA at 2.5 V power supply.
• A start up circuit was designed along side for functioning of the circuit.

2) Telescopic Cascode Differential Stage Design:

• In this project such a telescopic cascode amplifier was designed using a supply of 3 V in TSMC 0.35 µm process.
• A constant gm biasing circuit was used to bias the transistors. The DC gain achieved was 54 dB while the bandwidth was 70 MHz ,driving a 1 pF capacitor.
• Overall power consumption was 1.5 mW. The CMRR and PSRR achieved were 55 dB at 10 KHz.

3) Design of a single ended Folded Cascode Amplifier:

• In this project such a folded cascode amplifier was designed using a supply of 2.7 V in TSMC 0.35 µm process.
• The DC gain achieved was 50 dB while the bandwidth was 25 MHz driving a 1 pF capacitor. Overall power consumption was 1.1 mW.
• An output swing of 2 V p-p and a slew rate of 10µV/s were achieved with the same load.
• The PSRR and CMRR were close to 60 dB at 10 KHz ,while input referred noise was 10nV/√Hz.
• The 3rd Harmonic distortion was also computed as 50 dB using FFT. The entire circuit was biased by a reference of 5µA,generated using a constant gm biasing circuit.

4) Design of a 50 & Driver Amplifier:

• A class AB amplifier was designed in this project to drive a parallel load of 50 & and 200 pF.
• The overall quiescent power consumed was about 3 mW at a supply of 3 V.
• A p-p swing of 1 V was achieved with the above load. An HD3 of 50 dB ,computed using FFT ,was achieved with 1-V differential p-p swing and driving a load of 1K&.
• A unity gain frequency of 5 MHz and slew rate 10µV/s was achieved for a load of 1pF. The DC gain achieved was 75 dB driving only 200 pF and input referred noise was 10 nV/√Hz.

5) Designed a real switched-capacitor filter that is used in a cordless phone IC application:

• Designed Bandpass (1.5kHz - 30kHz) analog filter using Switched capacitor circuits with SC sampling frequency of 1.8432MHZ

Power electronics:

• Designed a controller based on K-Factor approach for a boost converter using PSpice to achieve a bandwidth of 1 kHz and a phase margin of 600.
• Designed the controller corresponding to the load current of 2 A .
• Also performed a time domain simulation of the boost converter with the designed controller and studied the performance of the system for step change in load current from 2A to 4A and from 4A to 2 A.

Digital(VLSI) Projects:

Design of Engine controller for a 12-cylinder 6-speed car
Objective: Design, Test and Layout an Engine controller chip in TSMC 0.25um technology.

• Worked with and led a team of 7 members to design the architecture, sub-blocks and layout and parasitic extraction for the complete chip.
• Power was optimized by using full static logic in all the blocks.
• Worked on the interface blocks of the chip to give inputs to the control blocks and to drive cylinders and gears emulated as capacitive and resistive loads.

Digital(VLSI) Labs:

Static logic:

• Implemented logic function using static logic for best speed.
• Determined the critical path and use design techniques to improve the circuit by optimizing the critical path.
• Then implemented the same logic function for minimum area with the direct and negated outputs available with minimum overlap.
• Dynamic logic:
• Implemented logic function using dynamic logic for best speed.
• Designed the layout and compared the speed of the circuit with the circuit designed using static logic.

Semiconductor Device :
1) Band structure Project:

• Developed an empirical pseudopotential code in MATLAB that calculates the bandstructure for Si, Ge and GaAs.

2)PN Diode Project:

• Developed a one-dimensional (1D) drift-diffusion simulator using MATLAB for modeling pn-junctions (diodes) under forward and reverse bias conditions.

3) MOSFET Project:
TCAD’s ATLAS package was used for modeling a MOSFET device structure. The appropriate model for low field mobility description in silicon inversion layers, Shockley-Read-Hall generation-recombination process , velocity saturation effect and impact ionization model due to Selberherr was used. The following set of simulation runs was performed :

• The role of the series resistance effects on the device output characteristics was demonstrated
• Investigated the role of the impact ionization process on the device performance, by including the Selberherr\'s model for impact ionization.

4) Silicon on insulator (SOI) Project:
TCAD’s ATLAS package was used .The ID-VD characteristics of a PD(Partially-Depleted) SOI device was simulated for three different values of the gate voltage. To properly account for the so-called "kink" effect, Selberherr\'s impact ionization model is activated .The transfer characteristics was plotted and the magnitude of the subthreshold slope was extracted for different Si film thickness.
5) Fully Depleted (FD) SOI Project:
TCAD’s ATLAS package was used .The 25, 45, 60,80,90,100, 120,140 and 180 nm gate-length fully depleted SOI devices were simulated and output characteristics using drift diffusion ,energy balance ,complete hydrodynamic model were plotted. For the 120 nm gate-length device isothermal energy balance and non-isothermal energy balance calculation of the device output characteristics was performed.

6) SCHRED Project:

• Quantum-mechanical size-quantization effects was examined in the operation of scaled MOSFET devices using SCHRED simulation software.

7) HEMT Project:
The HEMT geometry, material regions, doping profiles and electrodes were constructed in TCAD’s DEVEDIT package. TCAD’s ATLAS package was used to obtain the Id-Vd characteristics for three gate biases. At the end of the simulation, parameter extraction techniques are used .

8) Implant profile variation Project:

• The TCAD’s ATHENA package was used to see how the implant profiles vary for different values of the implant energy, which will lead to different values for the range and the straggle for the analytical model : Gaussian, Pearson and dual Pearson model.

9) Power SOI MOSFET Project:
The role of self-heating was examined in Bulk Si and Fully Depleted (FD) SOI power devices using TCAD’s ATLAS package. The following plots were determined:

• Device transfer Characteristics for bulk Si and fully depleted SOI MOSFET
• Device output characteristics for bulk Si and fully depleted SOI MOSFETs

10) Mobility calculation:
Developed Matlab code for Rode’s iterative method to compute the mobility as a function of the impurity concentration for n-type GaAs at T=300 K.
Scattering mechanisms included in the model are:

• Acoustic deformation potential scattering
• Polar optical phonon scattering
• Coulomb scattering

• Established knowledge about fundamental concepts of extensively used Monte-Carlo simulation procedure and concept of random statistics and computational overhead in MATLAB

Presentation:
“Canti-lever based biosensor”

Honors and Awards:
1) Dean list award in all four undergraduate academic year
2) University merit scholarship(BUET)in all undergraduate semesters expect 1st semester.
3 ) Education Board(government) scholarship for HSC result.
4) Primary scholarship(government)