SUMMARY

• Executive level product development/engineering program management leader with semiconductor memory (DRAM, SRAM, NAND), experience. 15+years servicing major OEMs and consumer customers
• Strong knowledge of DRAM (DDR2/3/4) discrete and modules (Over - clocked & Non-Over-clocked)
• Detailed definition of new products from product concept through mass production
• Present DRAM product portfolios to Networking forum, IDF, JEDEC and industry venues
• Project Engineer expert in product specification definition and qualification
• Manage product life cycle stages with focus on sustaining product production revenue
• Target markets and identify customers, develop roadmaps and define products
• Brought new products from definition through design and to production release including qualificationand reliability
• Made presentations and prepare collateral material for senior level executives
• Strong presentation and communication skills

TECHNICAL SKILLS

• SAP/ Agile/ Omify Tools
• VLSI Design Project
• Value Added Selling
• Effective Presentation Skills
• MS Office Suite
• Listening For Success
• Design Verification of ASIC
• Fundamentals of Sales & Marketing
• CMOS Technology

PROFESSIONAL EXPERIENCE

Confidential

Memory Project Consultant

Responsibilities:

• Advise senior engineering management on production of over-clocked DRAM3 & 4 Memory modules (UDIMM, RDIMM)
• Assist marketing to maximize product growing value based on new memory products, and assist procurement in selecting a DRAM speed grading strategy in order to profitably
• Assist first article and production testing for over-clocked DRAM Memory modules.

Confidential, Fremont, CA

DRAM Product development/ Engineering Project Manager

Responsibilities:

• Develop, define, strategy and execution of product / program from marketing. Establish and manage program & Drive the program through the entire product life cycle
• Evaluate and implement procedures that ensure goal achievement. Provide solutions to complex business issues.
• Survey & track DRAM current and future products, die and memory trends. Identify emerging technologies and trends that map to customers’ needs.
• Lead weekly team meetings, provide meeting minutes, track issues/ solutions on action items. Provide project status and maintain project schedule.
• Work with Marketing to ensure products and BOMs are released on time, update and accurate to support product launch.
• Work with supply base management team to update, review, and maintain supplier technology roadmap data.
• Overview the definition and tracking of all project schedules. Lead product lifecycle management. Provide technical support for OEM customers on DRAM & NAND
• Work closely with engineering & production and allocates resources as necessary to ensure deliverables are met.
• Travel to factory in Taiwan on every quarter to insure quality & engineering qualification in place
• JEDEC participation.

Confidential, San Carlos, CA

Product / Program Engineering Manager

Responsibilities:

• Build sale tools for DRAM and SRAM (presentation, application notes and datasheets).
• Provide solutions to customer technical questions and manage all engineering issues related to memory products.
• Interact with foundries for technical information related to products.
• Product roadmap development to define new products for legacy memory solutions.
• Track engineering (foundry/ suppliers) changes and provide ECN.

Confidential, San Jose, CA

Technical Application Manager

Responsibilities:

• Primary interface with design team for product specification and qualification for memory products design-in (Cisco, Nortel, Lucent, Siemens, Juniper, Xilinx, Altera, and Sun).
• Plan and manage of new DRAM/ SRAM technologies, custom package development, and qualification process with cross-functional teams.
• Worked with cross-functional teams: Design team, Product Planning group, Sales and Marketing to align memory product strategies.
• Managed engineering aspects for DDR2 (512M, 1G), and DIMM modules for Networking customers and Mobile DRAM chipset for Wireless.
• Responsible to assist FAE & sales to design-in/ win of DDR2 and high speed SRAM (QDR II). Applications include chipsets and reference design boards for current and next generation products for networking customers (Marvell, AMCC, Broadcom, others).
• Gained 70% additional design wins at Nortel, Lucent and Cisco (DDR2, SRAM). Increased 30% market share position in DDR2, DDR3 SDRAM in the Network market with chipset customers.
• Hosted customer and factory visits to promote products and build customer relationships. Drove products through product rollout meetings (Design & Product Application teams).
• Manage product life cycle for Samsung memory (DDR2 - DRAM; SRAM;NAND flash).
• Provide recommendation for risk mitigation as product/schedule changes are encountered. Manage & informed issues to engineering for successful closure with proactive planning.
• Performed competitive analysis to position Samsung memory products (DDR2) in market place.
• Coordinate technical and business analysis to support product development initiatives. Develop, with other key groups, strategies and tactics to gain design wins for new proprietary products.
• Resolve complex product problems including positioning, feasibility, partner relations and pricing strategy with customers and internal groups.
• Create and deliver campaign to evangelize on new product and concepts, build customer relationships and enhance sales opportunities.

Confidential, San Jose, CA

Sr. Staff Product Engineer

Responsibilities:

• Responsible for component engineering of DRAMs by supporting over 40 internal designers on device selection, operating modes, memory timing verification and system troubleshooting.
• Traveled to Asia Pacific and within North America to ensure suppliers met technical requirements.
• Chaired Supplier Assisted Qualification Program development and launched the program in nine months (Zero defects program & product quality).
• Supplier liaison responsible for qualifying Memory Semiconductors. Performed HTOL, HAST, ESD, Component/System SER, and Functional ATE Testing.
• Wrote new Synchronous DRAM spec that allowed design engineers to develop high-end computer main memory. Negotiated timing, power, and packaging specifications with customers.
• Worked on over ten design teams chartered to develop graphics controllers and frame buffers, main memory, disk buffers, and networks.

Confidential, Sunnyvale, CA

Sr. Product / Test Engineer

Responsibilities:

• Designed, developed and implemented test strategies for ECL gate arrays with embedded DRAM, SRAM, and simulation.
• Debugged from design integration. Validated completed test packages for ATE consisting of test plan software, test patterns and test fixtures.
• Designed and developed the RAM test pattern libraries.
• Lead a group consisting of four engineers and technicians for a project that developed an application of ATE test (Advantest T3381).