SUMMARY

• Expert wif over 19+ years of IT experience including Architecture and Designing of SW Stack on RTOS based and RTOS independent platforms
• Multi threading based System Design and development in teh RTOS like MQX, MicroSAR, Mucho, RTXC, Windows and Ti DSP/BIOS, ADI VDK++
• Implementation of Real time kernels and schedulers on various DSP based embedded systems
• Developed Board support packages (BSP) and performed Board bring up activities
• Design and development of Low level firmware
• Implementation of communication protocols like IEEE P1451.2 in Embedded systems
• Device drivers development for Camera, DTV, LCD/LED Displays, A/D or D/A converters, DMA, SDRAM, SRAM, FLASH, EPROM Memories, UART, SPI, I2C, I2S, AR INC 429 and also for RS - 232/RS-422/RS-485 interfaces
• Designing and Implementation of boot loaders and Re-Flash utilities
• Implementation of serial communication protocols like SPI, SCCB/ IIC using GPIO pins
• C++, C and Assembly language programming for ARM, ADI SHARC, 2115, 2101, 2171, BlackFin BF-533, TMS320C54/55/62/64X, CARMEL DSPs and Motorola Micro controllers 68HC05, 68HC08, S12 series
• Implementation of IP security algorithms like AES approved Rijndael and autantication algorithms like SHA-MAC, MMH-MAC in Embedded systems
• Porting and optimization of complex DSP algorithms like Goertzel DFT, Hilbert transform, FFT, Custom developed Image Processing algorithms and speech codec like G.711, G.726, G.723 and speech frame recovery algorithms
• FPGA based silicon verification and Post Silicon validation
• Pre and Post Silicon Validation for various SOCs in multiple domains
• Debugging and testing of complex embedded systems using DSPs, Microcontrollers, Microcomputers and Microprocessors
• Capable of understanding teh HW schematics wif respect to Firmware, BSP and SW requirements
• Familiar wif tools like ICE, CRO, Logic analyzer, PCB design tools and methodologies
• Technical Leadership of teh team
• Experience in implementing process and practices in software development life cycle
• Ownership of Technical decisions for project
• Inter department co-ordination (Testing, Hardware)
• Customer Interaction
• Familiar about teh DO-178B process and guidelines.

TECHNICAL SKILLS

Languages: C++, C, Assembly (Processors like TMS320C55X, 54X, 62X, 64X, ADSP 2101, 2115, 2171, 21060, BF-533, 68HC705C8A, 9S12DJ256, CAMREL DSP, ARM-7, ARM-11, Vybrid)

RTOS: Mucho, RTXC, Ti DSP/ BIOS, Visual DSP Kernel, Windows, AUTOSAR

Tools: GNU, Code Composer Studio, Visual DSP ++, Code Warrior, MOTOROLA Digital DNA IDE, RVDS, Metrowerks, XIDE, Micro Soft Visual Studio, WxWidgets, Eclipse DS-5

Configuration Tools: Clear Case, Visual Source Safe, WinCVS, Tortoise SVN, CVS

Simulator/ Emulator: Code Composer Studio JTAG, USB Emulators, Visual DSP++ In-Circuit Emulator, Metro works BDM Emulator, Motorola In-Circuit Simulator, Code Blocks

Compilers: Visual C++, CCS 2.20, Visual DSP++ 3.5, ADS 2.2, RealView2.0, GNU GCC, WxWidgets

BSPs & Processors: TMS320C5X/6X, Ti DSKs, JTAG Emulators, Vybrid, ADI ADSP 2010, 2115, 2171, SHARC, BF-533, EZ-KIT LITE, ICE, MOTOROLA 68HC05C8A/ P8A, 705, MC9S12DP256B, CARMEL DSP, XILINX CPLD, Board bring-up like custom developed boards like kShipra, PINE, LUXOR, IS-DISPLAY HIM, DIM, FCCMI, STIM, SA-1000, HA-2000

PROFESSIONAL EXPERIENCE

Confidential

Responsibilities:

• Leading teh GM Global-B Project for Confidential .
• Developing teh System software for Confidential Automotive product for GM.
• Developing CAN driver and HS CAN Transceiver driver for Confidential Amplifier.
• Porting teh Confidential Amplifier SW to MICROSAR OSEK RTOS.
• Bringing up teh Free scale ARM based Vybrid on Confidential custom developed board.
• Confidential custom developed board bring-up.
• Porting teh Confidential amplifier software to AUTOSAR 4.0
• Integrating teh Vector AUTOSAR stack wif Confidential amplifier Software.
• Integrating teh Vector UDS (Unified diagnostic stack) wif Confidential Amp.
• Configuring teh Vector AUTOSAR modules.
• Working wif AUTOSAR BSW Modules and RTE configuration.
• Implementing teh GM Partial network for Confidential Amp.
• Configuring teh GM SUM modules like, PNC, ASM, SSM, SUSD, ERRH etc.
• Integrating teh UDS based Vector Flash boot loader wif Confidential amplifier.
• Developing teh Watchdog module.
• System startup Timing analysis and optimization.
• Designing teh better Audio control methodology for Global-B Project.
• Implementing teh UDS based diagnostics for Confidential AMP.
• Working knowledge wif GMLAN and Geny tools.
• Flash Driver improvements and optimization.

Project Leader

Confidential

Responsibilities:

• AR INC 429 protocol implementation.
• Participating in SOI audits complaint to DO178-B.
• Fixing teh Change requests suggested by customer on teh end product.
• Suggesting on how to proceed wif teh Simulator to minimize teh verification time.
• Porting teh WRT DSP3 and DSP2 code to Ti-C3x simulator environment.
• WRT Verification of weather encode module about 35 SRs.
• TC, TP Reviews

Technical Manager

Confidential

Responsibilities:

• Responsible for system software development including Traffic manager and Switch fabric module.
• Architecting and Designing teh Switch Fabric Module enhancements.
• Integration of Dune Drivers wif Brocades System Software.
• Client interaction and support.
• Technical Reviews.
• Coordinating wif teh hardware and testing teams.
• Global team interaction.

Technical Manager

Confidential

Responsibilities:

• Handling customer activities.
• Responsible for entire VMC Integration wif Bluetooth Headset firmware on CSR chipsets.
• Customer interaction and support.
• Tuning teh Headset firmware to get better noise suppression wif VMC.
• Guiding teh team on customer activities.
• Peer Reviews.
• Coordinating wif teh hardware and testing teams.

Engineering Manager

Confidential

Responsibilities:

• Responsible for entire Host SW Team.
• Planning and executing teh SW development for Host SW.
• Architecting and Designing teh Host SW stack includes, UI, Middle Layer, BSP, Diagnostics and boot loader and Application bring-up.
• Middle Layer and Driver stack development.
• Common Framework development for RASS application and Silicon diagnostics.
• Integrating teh SPI/ I2C Drivers of third party HW module called Diolan.
• Leading teh pre and post silicon validation of teh VMC using Host SW.
• Design and implementation of command line interface for Diagnostics.
• Bring-up of teh custom developed board called kShipra and BSP development.
• Guiding teh team on Host activities.
• Technical Reviews and coordinating wif teh hardware and testing teams.

Engineering Manager

Confidential

Responsibilities:

• Develop teh Driver for MPEG HW accelerator.
• Develop teh system software STB chip sets developed by Confidential .

Technical Lead

Confidential

Responsibilities:

• Leading and handling complete responsibility of Display sub system.
• Implementation of Display driver using simple display controller used for smart panels.
• Implementation of Display driver using generic controller for DMA based.
• Design and re-factor teh existing display module in firmware.
• Performing silicon validation of existing display controller on latest SOCs.
• FPGA Validation of Display and camera controllers.
• Suggested improvements and involving into display controller design which can interface wif smart, dumb LCD panels and also wif DTV.
• Guiding and suggesting teh camera controller driver design and implementation.
• Design and Implementation of different LCD panel drivers for smart and dumb LCD Panels.
• Design and Implementation of DTV Driver.
• Design and implementation of display buffer management for faster video display.
• Implementing Display power saving methodologies.
• Integration of Jpeg Hardware accelerator based Jpeg Decoder into firmware.
• Guiding display team on regular activities.
• Peer Reviews.

Project Lead

Confidential

Responsibilities:

• Project Estimation, execution and leading wif complete responsibility of releasing teh product on time wif defined characteristics from software prospective.
• Continuous customer and Hardware team interaction regarding different requirements analysis, modification and decision making wif respect to Firmware.
• Involved in Multi-Threaded System Software Design as per teh Software Requirement Specification (SRS).
• MICRON Camera Capture Driver Development and testing.
• RS-232 Protocol and Message Handler Design, Implementation and testing.
• Hardware and software diagnostic development and testing.
• Software and Hardware Integration and testing.
• Peer Reviews

Project/ Porting Lead

Confidential

Responsibilities:

• Leading teh team wif complete responsibility of porting teh algorithm into Hardware.
• Multi-Threaded System Software Design and Development and validation in Ti DSP/BIOS environment.
• SOD Image Processing algorithm porting from PC environment to DSP environment and testing.
• Developing teh camera capture driver.
• Implementation of boot loader Re-Flash functionalities and testing.
• Design and implementation of SCI Driver and SCI Message Handler between DSP and PC.
• Design and implementation of SPI Driver and Message Handler between DSP and S12.
• Continuous customer and Hardware team interaction regarding different requirements analysis, modification and decision making wif respect to Firmware.
• PINE board bring-up and BSP development.
• Peer Reviews.

Project/ Porting Lead

Confidential, Bedford, MA

Responsibilities:

• Implementation of ITU defined G.723.1 speech codec in C55x assembly. This CELP based dual rate speech coder supports 5.3kbps/ 6.4 kbps compressed rates wif 30ms processing samples. This speech coder was optimized to 18 MIPS in C55x assembly.
• Proprietary Speech Frame Recovery for packet loss concealment algorithm implementation in C54x. Algorithm realizes teh recovery depending on pitch waveform recovery or last speech frames replacement.
• Implementation of IP security standard Rijndael and autantication algorithms SHA, MMH in C55x assembly. Present NIST approved Advanced Encryption standard Rijndael block cipher implementation supports variable data and variable key lengths wif 128/192/256 bit block and key sizes. Rijndael is S-block based Encryption standard. This Encryption standard is implemented and optimized to 0.5MIPS for 128bit block/ key size and varies wif other key sizes.
• G.711 Annexure lost packet concealment algorithm implementation in C54x.
• Frame work and Firmware development for VOIP systems.