Hardware Wireless Validation Engineer Resume San Jose, CA - Hire IT People

TECHNICAL SKILLS

Wireless Technology WiFi 802.11a/b/g/n/ac, Bluetooth, GSM, CDMA,GPS
Traffic Generators Iperf TCP, Iperf UDP, Ixia waveagent, Ixchariot, Igen, M - Tool
Packet Capture & Analysis Sniffers,Wireshark, Metageek Chanalyzer, Eye PA, NetMon
Languages & OS Python Scripting, C, AT commands, Embedded Linux, Unix,OsX
Simulation Tools Matlab, Simulink, ModelSim, LabVIEW, Stateflow Editor
Scopes & Debug tools Oscilloscope, Signal generators, Spectrum Analyzer, Litepoint IQxel M-16, Jira, CMW270, Teraterm, Putty, WinSCP.

PROFESSIONAL EXPERIENCE

Hardware Wireless Validation Engineer

Confidential, San Jose, CA

Responsibilities:

Performance Testing: Provided complete analysis and automated report generation for Rate Vs Range (RvR), Rate vs Orientation, Channel & Data-rate adaptation, Wifi Throughput Testing using Octoscope Anechoic Chamber Testbed on Set-top Boxes, BHR4, BHR5 Residential Gateways, Commercial Routers & Development Kits.
Incremental Builds & Feature implementation Test: Develop Test plan and test scenarios for BHR4 (RGateway)-Set-top box wifi analysis for QoS, WMM features, Transmit beamforming, MIMO, Receiver Sensitivity.
Support Diagnostic Parameters test feature implementation and test UI.
Conducted Dual Band Over The Air (OTA) and Conductivity testing with devices (3x3, 4x4) from multiple vendors, Wifi Traffic Congestion, Coexistence validation, Noise profiles analysis.
Troubleshooting and Problem Identification: Debugged Connection failure caused due to MAC address duplication on prototype builds, Dynamic lease time address stability issue, Analysis of packet captures for connectivity, retransmission, latency issues & logs.
Experience with BCM (wl cmds), Quantenna (qcsapi), Celeno & linux wireless utility.
Measure Tx Power, EVM, ACPR.
Proof of Concept (PoC) delivery in residential homes, Field Testing, log capturing and analysis, Interoperability Video Streaming Quality Testing with Multiple Clients.
Performance & Stability testing comparison with firmware images, App rev, chipsets, Coexistence testing, Supported in FCC certification Tests for DFS channel .

Test Engineer

Confidential, San Jose, CA

Responsibilities:

Test and Debug Digital, Analog and RF PCB’s units, OEM boards.
Validate Test Fixtures for Electronic Circuit Testing and System Performance.
Validate units in RF Anechoic chamber for Interference Monitoring and Reporting.
Telit G24 GSM module firmware installation using Motorola Development Kit.
Test station setup, Calibrating equipment and testing using LabVIEW Automated.
Participated in Field Testing for Standalone, RTK based GNSS Land Surveying.
Preparing Production and Test SOP’s for release as Company Documentation for streamlining tasks with time, resource optimization and WIP management
Supervised and trained technicians to perform functional test, debug and rework different assemblies based on customer requirement.

Manufacturing Engineer

Confidential, San Jose, CA

Responsibilities:

Elevating the Prototype level successful Vapor Phase Rework project to Large Scale Production Process.
Hands on Experience in creating Profile Boards for Thermal, Electrical analysis with up to 10 Data Points.
Reading Schematic Diagrams, X-ray, Cross section analysis for PCB’s. .
Sound Knowledge of IPC 600, IPC 610 rules and Interpretation of BOM comparison.

Process Engineer

Confidential, San Jose, CA

Responsibilities:

Developed Vapor Phase Process for reworking the Ball Grid Array Chips (BGA) chips.
Experience with BFT test, ESS test, Run-in test and ATC test methodology, data capture and report documentation.
Laboratory experience in Vapor Phase, SMT Convection heating methods, thermal profiling of PCB’s, Manual redress of BGA Chips for both Leaded and LeadFree Boards .

Research Assistant

Confidential, Long Beach, CA

Responsibilities:

Design, Development, Simulation and Test of multiple Mixed Signal Phase Locked Loop models in RF Range 250 MHz - 1.75 GHz, typically for Fast Switching Mobile Communication Signals.
Digital Phase Lock Loops like Conventional, Fast locking Phase Lock loops like Novel Flash with Multiple Charge Pumps and Single Charge Pump employing DAC were built and tested.

Project Intern

Confidential

Responsibilities:

Implementation of an algorithm called ‘ Matching Pursuit ’ for signal analysis.
This technique was an efficient approach towards analyzing stationary or non-stationary signals. Non-stationary signals include that of Bio-Medical, Seismic Waves and Machine vibrations for fault detection. Algorithm was implemented using MatLab.