Validation EngineerÂ Resume Portland, OR - Hire IT People

SUMMARY:

Highly motivated and skilled Software engineer (QA) with thorough hands on experience in test automation and validation of hardware, software/ Firmware stacks for semiconductor and complex large - scale systems. Design/Development of IC Verification Products (Design Automation).
Focused and independent team player for result driven environment.
Extensive experience in Software and Firmware test automation (test plan) and validation (regression) in an agile/scrum environment.
Excellent debugging and problem-solving skills.
Expert knowledge in Real Time Database Development.
Proven abilities to bring up platforms (hardware) first time with ingredient software stack debugging.
Strong Analytical Skills and Complex problem solving.

TECHNICAL SKILLSET:

Software/Tool: C#/.Net (Visual studio), TCL, Perl, MYSQL, C/C++, JAVA, XML, HTML, Ruby, Kernel calls, shell script (csh/bash), Netbatch.

Source Control: Continuous Integration (CI) with Git/GitHub, CVS, SVN.

OS/Protocol: Unix(Solaris) LINUX, WINDOWS, RTOS, ipmi, tcp/ip

Hardware/Tool: SMBUS, IPMI, IPMB, Schematics and Layout Editor, Logic Analyzers, Beagle.

Processors: Intel Xeon processors (Servers) and Intel Core processors (I5 and I7).

Bug(defect)/Testcase Tracking: Jira, HSD, RTC and Clear Quest.

PROFESSIONAL EXPERIENCE:

Confidential, Portland, OR

Validation Engineer

Responsibilities:

Server Platform FW Validation owner for performance monitoring of loads, this involved complex automated white box testing.
Server Platform FW Validation owner for power aware adaption, covered both automated/manual testing and collaborated results (data) analysis and interpretation with ingredient teams.
Server Platform FW Validation owner for Diagnostic Console, involved automated tests across various interface buses like smbus, ipmb and heci.
Trained several cross-Geo engineers across the team.

Confidential

Automation Engineer

Responsibilities:

Developed Real time database tool for Clock IC design, involved working with architects/users to come up with realistic specs, scripts for generating the database for several projects without a sweat and fast access to the database to reduce the runtime of the several down flow tools.
Developed and supported parasitic (resistance/Capacitance) Simulation/Manipulation tool, this involved working on several projects (multitask) at a time and driving tool changes by collaborating with Users, methodology owners and Junior Engineers in a fast-paced environment.
Developed Interactive database tool for storing full chip schema data of intel core processors, the database had check-in and check-out capability and had complex checkers incorporated to avoid wrong entries/deletion by users.
Lead Project Milestones meetings for the whole IC Timing Design flow of Intel core processors family.

Confidential

Engineering Intern

Responsibilities: